Author Topic: DRSSTC design questions + project progress  (Read 965 times)

Offline Vaclav

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Re: DRSSTC design questions + project progress
« Reply #20 on: June 01, 2019, 12:56:34 AM »
Hi Vaclav, the picture, gate 4, has a lot of noise I think remove the 2k's that you have added and add 2k from IGBT gate and emitter and see if that helps.
I added 2k across gate and emitter. --> signal didn't change
I even go down to 1K --> nothing changed
Removing the 2K to gnd. --> no change

I make this test only with on driver. Should I do this with all 4 at the same time?

also try adding incrementally resistance say 2k 2w temporarily across 1/2 of the bridge output to the center tap of mains multiplier capacitors. The idea is to add a mild resistive loading to your bridge output to the center tap of the capacitors to damp transient noise generated by emi.
I don't understand you completely. What do you mean with "center tap of mains multiplier capacitors" I have 2x 3.3mF in parallel to smooth the rectified sine.
I tried adding 2,5K from one inverter output to the negative rail. do you mean that?? --> nothing changed with this resistor.

I turned up the dead time to get this signals:




When I rise the dead time the noisy part goes more to the right and gets smaller.

I think the new dead time is much too high about 1,5-1,7µs (frequency is 82KHz):


The inverter output looks now like this (with the 75W bulb as load):
The edges are far too bad I think.

Without the bulb the inverter signal looks like this:


rising/falling edge (without bulb):



rising/falling edge (with bulb):



Could it be a problem that I use tow slightly different IGBT bricks?
FF400R12KT3: https://www.infineon.com/dgdl/Infineon-FF400R12KT3-DS-v03_00-EN.pdf?fileId=db3a304412b407950112b4345f49601d
FF400R12KE3: https://www.galco.com/techdoc/eupc/ff400r12ke3_dat.pdf
The FF400R12KT3 is a lite bit faster.

I really have no clue how to make the signal better or what the exact problem is.
« Last Edit: June 01, 2019, 12:58:15 AM by Vaclav »

Offline Teravolt

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Re: DRSSTC design questions + project progress
« Reply #21 on: June 01, 2019, 08:19:52 PM »
it looks good. I agree 1.5uS is a little to much, how about 1uS, is it adjustable? hear in the US we or I have 220vac with a center taped ground and typically builders use a full wave capacitive doubler to boost the voltage but I'm looking at your setup closer and I am assuming you have 220Vac with no center tap and you are running rectified mains and the big caps are your filtering and energy storage. have you tried firing up the bridge with a isolation transformer and variac? in a answer to your question about adding some dampening resistance at the output to a center taped junction ignore that. I was able to reduce the over shot on my bridge by adding non inductive resistance to a stiff reference. In your case I am not shure where to do that or even if it is necessary. have you tried adding the primary circuit and using the feed back yet? when you do start at a low mains voltage and monitor as raising the voltage watch for to much overshoot and cross conduction

In a note for your future builds I would have put the ADuM1200CR next to the UCC ic instead of separating them with a twisted pair and use a TTL A-drive and B-drive signals in coax, ie BNC. About using 2 different half bridges as long as your dead time covers the slow brick I think you will be ok. keep the pictures coming if you have questions. just remember that you are doing something that tesla enthusiasts don't usually do but because of its complications is done in the commercial arena all the time.

Offline Vaclav

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Re: DRSSTC design questions + project progress
« Reply #22 on: June 02, 2019, 12:25:42 PM »
I made some further test and went down with the dead time to 1µS.

I added 2k across gate and emitter. --> signal didn't change
I even go down to 1K --> nothing changed
I noticed that adding the resistor damps the spike. But not that much
IDK why I didn't see this last time...

I make this test only with on driver. Should I do this with all 4 at the same time?
I made the test with all 4 at the same time and noticed that the spikes on the gate signal for the high side IGBTs are much worse.
Than the spike on the gate of the low side IGBTs.
White high side gate (White is stored in the oscilloscope normally they are 180° phase shifted)
Yellow low side gate


I tried adding a resistor in series to the gate. At first I thought I don’t need them… now I think that was pretty naive.
I only have enough resistors to do this with 2 gates at the same time.
Each gate has 2,5Ohm in series.


These is the new voltage directly at the gats:
High side IGBT:




Low side IGBT:

Ignore the straight line at ~-18V I forgot the stop the oscilloscope.



Inverter output has now some flat part at 0V:




I will buy some smaller resistors 0,5Ohm and 1Ohm and redo the test with all 4 IGBTs.
« Last Edit: June 02, 2019, 04:24:00 PM by Vaclav »

Offline Teravolt

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Re: DRSSTC design questions + project progress
« Reply #23 on: June 03, 2019, 09:04:29 PM »
If you want to try more dampening going from each half bridge to ground say 1000 to 220 you will have try it your self. the last wave form is much better and when you get the spikes and overshoot under controle you might slowly decrease your dead time to something less to close the time at zero volts. you should be able to see on the scope as you are addjusting. Things may change when you add your resonant primary and feed back so go slow and monitor safely if you can whyle you see what happens when you turn up the voltage to see if the spikes get bigger.

Offline Vaclav

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Re: DRSSTC design questions + project progress
« Reply #24 on: June 06, 2019, 08:36:58 PM »
I added now 2,2Ohm in series to my gate
New signals looking like this:

"Worst" gate signal of all 4 signals:

Edges:

Edges in detail:


Inverter output:
The slope at the end is still there I think it's ok.

Edges:

I can't do anything against the sinusoidal part in the rising edge.

All my test until now were made with my "high voltage" DC power supply (max. 600V,6A,1000W)
I made all test with up to 325V.
I made the first test run with main power via isolation transformer.
One driver has failed and cause short circuit on one 18V rail.
I switched off the supply to all the control voltages (5V and 4x18V).
And it happened the way it had to... I blow another IGBT brick... (I can get a used on for 50€ at eBay, so it’s not that much of a problem)
I started digging around and noticed that the problem does not came from the driver and not from the controller.
The problem are the ADUMs the make a spike at the output if the low voltage supply is off before the high voltage side does.
This spike will occur at all 4 ADUMs at once and the drivers short the complete inverter.
As a workaround I will ad 0,5F at my 5V supply rail. I tried all my available big capacitors and measured that ~30mF are enough.
0,5F is the next bigger cap I find at the shop I'm used to buy from.


I've already finished winding my current transformers.
I will mount them on a brass rod.


I'm on holiday now. I' ll be back in about 3 weeks.
« Last Edit: June 06, 2019, 08:41:15 PM by Vaclav »

Offline Teravolt

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Re: DRSSTC design questions + project progress
« Reply #25 on: June 07, 2019, 06:14:45 PM »
you might be able to find where the spikes are comming from by finding out what edge or operation they are synced to. you also may have stray inductance in your connections that are feading into the driver

Online Netzpfuscher

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Re: DRSSTC design questions + project progress
« Reply #26 on: June 07, 2019, 08:04:57 PM »
It's more simple the datasheet has a table. It's normal that you get a high signal, if you switch off the Vcc.


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Re: DRSSTC design questions + project progress
« Reply #26 on: June 07, 2019, 08:04:57 PM »

 


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