Author Topic: (DR)SSTC II  (Read 2634 times)

Online Laci

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Re: (DR)SSTC II
« Reply #20 on: January 06, 2019, 11:55:09 AM »
The top section is the primary coil support,which is made out of a wooden frame screwed together and a sheet on the top to secure the secondary coil tight.The bottom section is for the driver circuit with a switch for half/full wave rectification and another for bypassing the DC bus capacitor charging resistor.I use crocodile clips with twisted wires for lower resistance as primary-inverter connection.








The mechanical side is good,but the electrical part still has problems to solve.I'll try phase lead,since the horrible waveforms are not going to stop.
As I said,I'm still looking daily for IGBT bricks and found some,however they don't have informations about switching losses.Can they be calculated or estimated?

Some more pictures about the testing progress:





I wound a CT with thicker and not twisted wire,no better waveforms:




Offline flyglas

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Re: (DR)SSTC II
« Reply #21 on: January 06, 2019, 12:43:46 PM »
Hi Laci,

I think the spikes in your measurements reslults from the H-bridge design.
The black supply leads to the IGBTs in the last picture are much to long.
It is very important to minimize inductance in the commutation path.

A good example for a low inductance design is this h-bride: http://www.loneoceans.com/labs/sales/easybridge/

Offline Uspring

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Re: (DR)SSTC II
« Reply #22 on: January 06, 2019, 07:02:14 PM »
Voltage spikes around a switched inductive load like a DRSSTC primary are common. Current spikes are difficult to explain. My guess is, that they aren't real and you are somehow picking up noise in your CT.

Online Laci

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Re: (DR)SSTC II
« Reply #23 on: January 06, 2019, 09:23:19 PM »
@flyglas
Thanks for the advice.I connected both of my large capacitors with short wires to the two half bridges.Unfortunately they made no difference,maybe the twisted wire has low enough resistance.





@Uspring
I think you are right.Across a large 470 ohm burden resistor the primary current waveform is perfect.The noise is probably constant at every voltage and it's a lot more significant in case of a low amplitude signal.The reason I care so much about the noise is the previous test with secondray,when the OCD kept kicking in.With the 470 ohm burden I measured 95V peak-peak so about 200A in the primary.With the OCD CT connected to the driver(which has a 12 ohm burden)the OCD trips at 1.08V,which shows just 90A in the primary!The ZCS is not perfect,but acceptable.



The two voltages at the LM311's inputs when it starts tripping(yellow:the disgusting primary current-rectified,loaded with the burden resistor-,blue:OCD setting potentiometer):




Primary current with 470 ohm burden resistor:




ZCS(470 ohm burden resistor):


« Last Edit: January 06, 2019, 09:25:49 PM by Laci »

Offline Mads Barnkob

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Re: (DR)SSTC II
« Reply #24 on: January 07, 2019, 06:39:56 AM »
About the IGBT bricks you found, you will have to do some guesswork/extrapolation of the available data, you do know these IGBT calculations? http://kaizerpowerelectronics.dk/tesla-coils/drsstc-design-guide/igbts/

Twisted wires will only have a low inductance if it is the two opposite currents flowing in each their wire, the same potential in two twisted wires does not have any effect on inductance. I got some information on busbar, primary circuit and low inductance design collected here: http://kaizerpowerelectronics.dk/tesla-coils/drsstc-design-guide/busbar-and-primary-circuit/

@Uspring: Can you explain the saw tooth inverter output voltage? Is there a hidden single pulse QCW buck-converter inthere somewhere? ;)
http://www.kaizerpowerelectronics.dk - Tesla coils, high voltage, pulse power, audio and general electronics

Offline Hydron

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Re: (DR)SSTC II
« Reply #25 on: January 07, 2019, 08:09:49 AM »
I assume that the "saw tooth" output is due to too much ESL/ESR in the DC link/bus capacitors - I have seen similar (though not as bad) on my larger coil at high currents.

As for spikes on the CT output, I have also seen this - it's worse with lower burden resistance/higher ratio CTs, and my Pearson current monitors show less than my DIY CTs. I've attached an example of this - red trace is a low-ratio pearson with an attenuator (helps even further), blue is a DIY CT:

This is still a decent performance from the DIY CT - ignoring the minor sensitivity difference they both give very similar output with the exception of more noise on the initial transitions where the IGBT switching isn't quite as soft as it is later. This difference in noise performance can also be seen between Pearson models with differing V/A ratios.

Online Laci

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Re: (DR)SSTC II
« Reply #26 on: January 07, 2019, 12:43:26 PM »
About the IGBT bricks you found, you will have to do some guesswork/extrapolation of the available data, you do know these IGBT calculations? http://kaizerpowerelectronics.dk/tesla-coils/drsstc-design-guide/igbts/
I found no informations in the datasheet about the switching losses,so I mainly compared the switching speeds with CMx00 modules and calculated a Fmax1 of 307kHz.The oneTesla bridge design accentuates the turn-off delay time,which is better than the CM200DU-24F's used by loneoceans at 120kHz in his DRSSTC 2.


Twisted wires will only have a low inductance if it is the two opposite currents flowing in each their wire, the same potential in two twisted wires does not have any effect on inductance. I got some information on busbar, primary circuit and low inductance design collected here: http://kaizerpowerelectronics.dk/tesla-coils/drsstc-design-guide/busbar-and-primary-circuit/
At first I wanted to use twisted cables for bus connections to lower the DC resistance,eventually used up the remaining twisted cable for the other connections.

I assume that the "saw tooth" output is due to too much ESL/ESR in the DC link/bus capacitors - I have seen similar (though not as bad) on my larger coil at high currents.
I desoldered the two 1uF 400VCD polypropylene "snubber" capacitors and made a ESR test on them,on the MMC and on the DC link capacitors accordingly to this video: https://www.youtube.com/watch?v=115erzCCxgE
Interestingly the "snubber" caps and the MMC shows a triangle/sawtooth waveform at 150kHz,but without the "snubbers" and changing the MMC to variations of other capacitors rated for high enough voltage the waveforms are the same,just the frequency changes.
The large DC link capacitors are fine,I don't think they have too high ESL/ESR,they were designed for this kind of purpose.

I feel bad for sweating with such an uncommon bug for weeks.Of course it would be easier to buy a kit and press a button to turn it on.:)
« Last Edit: January 07, 2019, 12:51:23 PM by Laci »

Offline Uspring

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Re: (DR)SSTC II
« Reply #27 on: January 07, 2019, 01:30:36 PM »
Wrt the sawtooth voltage, Hydrons remark on the DC bus caps seems on the point. You also have to take care not to introduce too much resistance (and  inductance, causes voltage spikes) in the wiring between the bus caps and the bridge.

You also have to be careful about choosing a too large burden resistance for your CT. That will cause a phase shift between primary current and the CTs output voltage. Do you know the CT inductance? Its reactance, i.e. 2*pi*f*L should be a 100 times or more larger than the burden resistor. Otherwise ZCS becomes difficult.

Online Laci

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Re: (DR)SSTC II
« Reply #28 on: January 07, 2019, 08:53:32 PM »
I made a new ugly looking,but low inductance bridge using only thick copper plate.Coincidentally the primary current with 10 ohm burden is noisy again,the bridge output now became noisy sawtooth... :-X
I should leave the thing as it was and move on to a more professional thing with newer driver and brick inverter.No way it gonna repair itself by a snap,just started to make me angry.




Offline Hydron

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Re: (DR)SSTC II
« Reply #29 on: January 07, 2019, 10:23:38 PM »
Sorry about the confusion about bus vs capacitor ESL - I should have specified I meant the combination of the two. The bus layout in your photos (including the latest) is still a high inductance layout which I would expect to cause both spikes and the "sawtooth" waveform.

For best results the positive and negative rails of the bus should be wide parallel planes, and the emitter-collector connection between the two transistors in each leg should be as short and fat as possible. I suspect some of your noise is caused by this bus inductance, in addition to the sawtooth output voltage waveform.

An easy way to fabricate such a bus (if you are familiar with PCB design tools) is to make it out of a PCB, however you would need to consider clearances and copper thickness (e.g. 1oz is probably not OK for a 1000A peak coil, but may be fine for ~100A if traces are doubled up and designed appropriately). If you are not familiar with PCB design tools and requirements then copper sheeting can be bought on ebay etc, and works well with IGBT bricks and the appropriate mounting screws/hardware and some labour cutting out the appropriate areas and holes. I would suggest that a PCB based design is by far the best way to go for TO-247 IGBTs however.

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Re: (DR)SSTC II
« Reply #29 on: January 07, 2019, 10:23:38 PM »

 


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