Author Topic: Next Gen DRSSTC  (Read 22768 times)

Offline Netzpfuscher

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Re: Next Gen DRSSTC
« Reply #80 on: October 23, 2019, 09:09:19 AM »
The secondary CT input is on the revision 2 of the PCB. That's the one on github. But it's not realy used in the firmware, only for the autotune. But I haven't used it for a long time. I even was thinking if I can toss it from the firmware.

I can export all PCB files. I need to make gerbers for myself to order some PCBs. But I'm very busy in the moment.

I started with a Kicad design, but it's not finished: https://github.com/Netzpfuscher/UD3_Kicad
I tried to do some reduction of special components and go for a 4 layer PCB. I'm happy if someone helps me with the whole UD3 thing ^^

This is my actual kicad progress:


Offline fnordest

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Re: Next Gen DRSSTC
« Reply #81 on: November 25, 2019, 09:29:00 PM »
Big respect! Really great work  :D. I just got myself a dev board and as soon as i have everything up and running i will try and see if i can contribute. Right now i am trying to connect over serial but without success. USB works fine. 

Cheers

Got it! I had to deactivate min protocol.
« Last Edit: November 26, 2019, 09:37:57 AM by fnordest »

Offline Netzpfuscher

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Re: Next Gen DRSSTC
« Reply #82 on: December 26, 2019, 11:05:37 PM »
I improved some things in the software.
-The drums in SID are better now
-Autotune has a warning due to hardswitching
-Sanity checks for current transformer measuring range (burden/current/turns)

We upgraded Florians coil to SKM600 bricks and reached the 3m.




And I worked a little bit on my inverter. Now also with SKM600. ^^





And I bought a car full of new DC link caps 350uF 1500V partly for our next coil with FZ1200 bricks. An because they were cheap ^^

« Last Edit: December 26, 2019, 11:09:53 PM by Netzpfuscher »

Offline futurist

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Re: Next Gen DRSSTC
« Reply #83 on: December 27, 2019, 01:22:12 AM »
Wow :D
How much current are you pushing trough SKM600?

Why did you go for 4-layer pcb, were there any layout issues with 2-layer one? They are at least 3 times more expensive to manufacture unfortunately (elecrow, jlcpcb)

Offline Netzpfuscher

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Re: Next Gen DRSSTC
« Reply #84 on: December 27, 2019, 09:16:34 PM »
The OCD is set to 1200A and we getting a peak of 1500A. During the music the coil consumes from 10-20kW of power with 565V at the bus.

No there are no issues. I am working also on a new revision from the 2 layer version in Altium.
I started the Kicad 4 layer version with the intention to integrate Ethernet and with the added complexity I wanted a better power routing on the board, so I went to 4 layer. Yes you are right it is not cheap.

The latest pcb:


« Last Edit: December 27, 2019, 10:14:44 PM by Netzpfuscher »

Offline Hydron

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Re: Next Gen DRSSTC
« Reply #85 on: December 28, 2019, 02:41:45 PM »
And I bought a car full of new DC link caps 350uF 1500V partly for our next coil with FZ1200 bricks. An because they were cheap ^^


Nice work! I saw those cheap caps on eBay too, problem was the shipping outside Germany was 10x the cost of the caps themselves. Good to see someone is going to get some use out of them!

Offline acobaugh

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Re: Next Gen DRSSTC
« Reply #86 on: January 15, 2020, 08:57:37 PM »
Is there any interest in also helping to maintain a 2 layer version in kicad? I'm with futurist on this one. 4-layer boards seem to be at least 2x as much as 2-layer boards.

I'm also beginning to get the sense that maybe a version of this driver based on an STM32 MCU might be better for more of us to work on? Just barely dipping my toes into the embedded systems waters, so I'm not sure what the real differences are between the cypress PSoCs are and a straight STM32, at least in terms of how the UD3 is using them. All I know is from vscode on linux and the PlatformIO extension I was able to easily hack on and compile firmware for something else.

Offline Netzpfuscher

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Re: Next Gen DRSSTC
« Reply #87 on: January 16, 2020, 11:59:04 AM »
No, it's not possible to use a STM. The Psoc has a "FPGA" like part for Analog and Digital. The UD3 makes heavy use of this, the switching logic is independent from the CPU. If you want to migrate to another CPU I think you need a combination of CPLD and micro. But this will definitely more expensive.
The best candidate for a CPU upgrade is the Psoc 6 but it can be tricky because the hardware is different and it has less macro cells, but a dual core CPU (M0 and M4). It is definitely the better choice for number crunching due to the FPU.
I work on a revision of the two layer board in Altium. But I am a little bit busy at the moment. I can push it to GitHub it would be nice if you can migrate to Kicad.

Offline Netzpfuscher

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Re: Next Gen DRSSTC
« Reply #88 on: March 11, 2020, 11:31:41 AM »
Big news!!!

I got my new PCBs and made a small batch (5) for me and some friends  8) When I tested everything, I put the gerbers online.

But there a some new cool features in the software too.

-There is a option for line coding. This activates Manchester encoding and decoding. It encodes the UART on a 8 times faster carrier. It is DC free!! so it can transmitted over a transformer or optics from fiber ethernet. I think it also works over SFP modules  8). Be careful with the baudrate 500 kbaud results in a 4 MHz carrier. The bootloader supports this too.

-WS2812 it's highly in development but it works with a 8x8 matrix. There is some visualization of the synthesizer or the bus status.

-Voltage measurement of the driver voltage. Not very accurate but better than nothing.


https://github.com/Netzpfuscher/UD3





Offline oneKone

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Re: Next Gen DRSSTC
« Reply #89 on: March 11, 2020, 10:50:36 PM »
oh wow, it looks brilliant! tbh even though your project is beyond me, it's still awesome to see the development you're putting into it.

also,
where did you get the boards made, the soldering looks damn decent!

Offline fnordest

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Re: Next Gen DRSSTC
« Reply #90 on: March 13, 2020, 11:27:13 AM »
These are good news indeed  ;D i can't wait to check out the new features and run my system with two of those!

Do you have any plans about selling populated boards?

Offline Netzpfuscher

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Re: Next Gen DRSSTC
« Reply #91 on: March 13, 2020, 08:53:01 PM »
@onekone
The boards are from jlcpcb, I ordered a stencil too. We pick and placed by hand and soldered with a cheap Chinese reflow oven.

@fnordest
It took around one hour for one board. I don't know if I make another run. The parts alone are around 70€ for a single board. The costs for the parts go down quickly if the quantity is higher. For 50 it's around 40€/board.
« Last Edit: March 13, 2020, 08:59:05 PM by Netzpfuscher »

Offline Hydron

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Re: Next Gen DRSSTC
« Reply #92 on: March 17, 2020, 01:47:14 PM »
Thanks for the new features - will have to have a play with them. I've just packed my UD3 to come with me on a hastily re-arranged trip to NZ (where my larger coil is), so I might be able have another go at using it on that. Gotta use those 2 weeks in isolation somehow!

For those that may not realise, manchester encoding would also likely allow for the use of cheap TOSLINK cables and recievers/transmitters. It would however need to be translated back to a normal UART encoding on the PC control end.

Offline malte0811

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Re: Next Gen DRSSTC
« Reply #93 on: March 17, 2020, 06:52:59 PM »
TOSLINK works quite well already (without Manchester encoding), but some receivers work better than others. I use 2 cheap receivers I got from Netzpfuscher. They work reliably at 500k baud, but when I tested them at ~115k, the signal at the receiver went high too soon when transmitting a character with a long chain of 0 bits. I assume that with less suitable modules this happens quicker, so it's a problem even at 500k baud.
Manchester encoding could fix this, and since the modules (at least the ones I have) seem to be fine with a constant "high" signal it would be possible to use a standard UART module at the PC and do the Manchester encoding in software (effectively using 4 bits per byte).

For the "real" Manchester encoding Netzpfuscher implemented I believe the plan is to use another PSoC at the PC end.

Offline Netzpfuscher

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Re: Next Gen DRSSTC
« Reply #94 on: March 23, 2020, 02:33:08 PM »
I designed a SFP to 5v TTL circuit. It uses only standard components and works from around 50kHz to 16MHz. The lower bandwidth depends of the used SFP module. A 2 layer Kicad board is in progress.



Offline Netzpfuscher

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Re: Next Gen DRSSTC
« Reply #95 on: April 18, 2020, 08:26:15 PM »
Cool new things in the dev branch. It's possible to define a Master-Coil and multiple Slave-Coils. For this it was needed to expand the SID-frames with a timecode which is written by the master and transmitted to all slaves. The UD3s are playing the frames by the timecode. To get it over multiple control computers working the master sends his time to all slaves every 500ms. The slaves are calculating a offset (which get smoothed to get rid of latency jitter) to their time and are sending the corrected time to their UD3 which is syncing to this time (the master time). I need to measure the timing differences but it sounds good.

In every UD3 it's now possible to define a filter string in a simple format:
f<100 = only frequencys over 100Hz are played
f>500 = only frequencys under 500Hz are played
c0 = only midi/sid-channel 0
c1 = only midi/sid-channel 1
c3 = only midi-channel 3

so a string can look like: "c0c3f<100f>500"

With this filter it is possible to split the music over many coils, I think the only limit is the bandwidth of the ethernet  ;D If the lockdown is over I need to test it on the real coil.


Offline fnordest

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Re: Next Gen DRSSTC
« Reply #96 on: April 19, 2020, 11:13:57 AM »
It is really awesome to see this project develop - keep it coming  ;D. I am close to the point where i can put my UD3 in a real coil. Everything works just beautifully. The only thing which gives me a little trouble is the connection to the SID server. I have tried jsid2play but it disconnects NETSID with error because the filter function is not found. I tried different settings for the MOS6581 but no luck so far.

What SID player and editor do you use?

Maybe i could look into a implementation of OSC for the UD3. I think that would make a smooth integration in a professional stage setup. Unfortunately i don't know how to java so it may take a while.

Right now i am messing with java and node trying to build Teslaterm from source.  :o When i connect to teslaterms web-server i get a nested UI in the lower part of the main UI where the terminal should be. I am trying to fix this and get more familiar with java in the process.


Offline Netzpfuscher

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Re: Next Gen DRSSTC
« Reply #97 on: April 19, 2020, 05:18:00 PM »
Yes yesterday I found it too. Actually the only working SID-Player is ACID64, this was the player which I used for testing and I only implemented the parts of the protocol which this player uses. I need to work a little bit to get full compatibility.

There is a OSC module in node.js, I can take a look on this. My work on all of this is for professional use, sadly due to corona our big event is canceled.

The nested UI thing is only present in Firefox, I need to fix it. You can use Chrome. I merged the dev branch to the master, now everything is up to date. But at the moment I can not upload a new prebuild release. There is a problem while packaging the node modules. But everything should work if you install node.js. But I compiled new UD3 firmware binarys the "cyacd" files are in the git.

At the first time you need "npm install" after that you can run it with "node index.js -c config.ini".

The SID function of the new UD3 firmware is incompatible with my version of Teslaterm (Malte is working on a newer, which is not yet ready) and it is incompatible with older versions of UD3-node!!!!!!!!

Offline fnordest

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Re: Next Gen DRSSTC
« Reply #98 on: April 20, 2020, 06:09:26 PM »
Thanks, i still have the firmware from last year running  8). Connection to SID server and replay works fine with acid64. Teslaterm-master runs aswell.  ;D

Offline Netzpfuscher

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Re: Next Gen DRSSTC
« Reply #99 on: June 14, 2020, 06:47:06 PM »
I fixed some small bugs, and a big bug (lead time has no effect, I don't know since when, but the bug is very old):
https://github.com/Netzpfuscher/UD3

There are also new binarys:
https://github.com/Netzpfuscher/UD3/tree/master/common/binary/UD3


And I added a little bit of documentation in the Readme.
https://github.com/Netzpfuscher/UD3/blob/master/README.md

And a small getting started:
https://github.com/Netzpfuscher/UD3/wiki

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Re: Next Gen DRSSTC
« Reply #99 on: June 14, 2020, 06:47:06 PM »

 


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