Author Topic: Next Gen DRSSTC  (Read 16485 times)

Offline Netzpfuscher

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Re: Next Gen DRSSTC
« Reply #80 on: October 23, 2019, 09:09:19 AM »
The secondary CT input is on the revision 2 of the PCB. That's the one on github. But it's not realy used in the firmware, only for the autotune. But I haven't used it for a long time. I even was thinking if I can toss it from the firmware.

I can export all PCB files. I need to make gerbers for myself to order some PCBs. But I'm very busy in the moment.

I started with a Kicad design, but it's not finished: https://github.com/Netzpfuscher/UD3_Kicad
I tried to do some reduction of special components and go for a 4 layer PCB. I'm happy if someone helps me with the whole UD3 thing ^^

This is my actual kicad progress:


Offline fnordest

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Re: Next Gen DRSSTC
« Reply #81 on: November 25, 2019, 09:29:00 PM »
Big respect! Really great work  :D. I just got myself a dev board and as soon as i have everything up and running i will try and see if i can contribute. Right now i am trying to connect over serial but without success. USB works fine. 

Cheers

Got it! I had to deactivate min protocol.
« Last Edit: November 26, 2019, 09:37:57 AM by fnordest »

Offline Netzpfuscher

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Re: Next Gen DRSSTC
« Reply #82 on: December 26, 2019, 11:05:37 PM »
I improved some things in the software.
-The drums in SID are better now
-Autotune has a warning due to hardswitching
-Sanity checks for current transformer measuring range (burden/current/turns)

We upgraded Florians coil to SKM600 bricks and reached the 3m.




And I worked a little bit on my inverter. Now also with SKM600. ^^





And I bought a car full of new DC link caps 350uF 1500V partly for our next coil with FZ1200 bricks. An because they were cheap ^^

« Last Edit: December 26, 2019, 11:09:53 PM by Netzpfuscher »

Offline futurist

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Re: Next Gen DRSSTC
« Reply #83 on: December 27, 2019, 01:22:12 AM »
Wow :D
How much current are you pushing trough SKM600?

Why did you go for 4-layer pcb, were there any layout issues with 2-layer one? They are at least 3 times more expensive to manufacture unfortunately (elecrow, jlcpcb)

Offline Netzpfuscher

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Re: Next Gen DRSSTC
« Reply #84 on: December 27, 2019, 09:16:34 PM »
The OCD is set to 1200A and we getting a peak of 1500A. During the music the coil consumes from 10-20kW of power with 565V at the bus.

No there are no issues. I am working also on a new revision from the 2 layer version in Altium.
I started the Kicad 4 layer version with the intention to integrate Ethernet and with the added complexity I wanted a better power routing on the board, so I went to 4 layer. Yes you are right it is not cheap.

The latest pcb:


« Last Edit: December 27, 2019, 10:14:44 PM by Netzpfuscher »

Offline Hydron

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Re: Next Gen DRSSTC
« Reply #85 on: December 28, 2019, 02:41:45 PM »
And I bought a car full of new DC link caps 350uF 1500V partly for our next coil with FZ1200 bricks. An because they were cheap ^^


Nice work! I saw those cheap caps on eBay too, problem was the shipping outside Germany was 10x the cost of the caps themselves. Good to see someone is going to get some use out of them!

Offline acobaugh

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Re: Next Gen DRSSTC
« Reply #86 on: January 15, 2020, 08:57:37 PM »
Is there any interest in also helping to maintain a 2 layer version in kicad? I'm with futurist on this one. 4-layer boards seem to be at least 2x as much as 2-layer boards.

I'm also beginning to get the sense that maybe a version of this driver based on an STM32 MCU might be better for more of us to work on? Just barely dipping my toes into the embedded systems waters, so I'm not sure what the real differences are between the cypress PSoCs are and a straight STM32, at least in terms of how the UD3 is using them. All I know is from vscode on linux and the PlatformIO extension I was able to easily hack on and compile firmware for something else.

Offline Netzpfuscher

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Re: Next Gen DRSSTC
« Reply #87 on: January 16, 2020, 11:59:04 AM »
No, it's not possible to use a STM. The Psoc has a "FPGA" like part for Analog and Digital. The UD3 makes heavy use of this, the switching logic is independent from the CPU. If you want to migrate to another CPU I think you need a combination of CPLD and micro. But this will definitely more expensive.
The best candidate for a CPU upgrade is the Psoc 6 but it can be tricky because the hardware is different and it has less macro cells, but a dual core CPU (M0 and M4). It is definitely the better choice for number crunching due to the FPU.
I work on a revision of the two layer board in Altium. But I am a little bit busy at the moment. I can push it to GitHub it would be nice if you can migrate to Kicad.

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Re: Next Gen DRSSTC
« Reply #87 on: January 16, 2020, 11:59:04 AM »

 


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