Author Topic: First SSTC build - some questions  (Read 3729 times)

Offline zytra

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Re: First SSTC build some questions
« Reply #20 on: December 30, 2020, 03:44:58 AM »
I'd like to read more on parallel planes before I start the next one up (DRSSTC, perhaps based on that same 3.5" coil). By parallel do you mean they need be separated by a layer of insulating material? or could they technically be running side by side (co-planar, like a PCB)?

Regarding the capacitor, I changed to a smaller value (0.68uF, with a little higher ESR value 45mohm vs 25mohm) and it seemed like an in-between scenario.

Between cleaner Gate and cleaner Emitter, which one should I pick? Ideally, I'd want both cleaned up of course. The 1uF capacitor did reduce the ripples on the Vbus/Emitter but the gate looked pretty bad, though this ringing is probably faster than the gate can open.

Tomorrow, I could try a film 4.7uF that I have lying around, and perhaps add some resistance to gate if ringing on the gate is really bad.



On somewhat not directly related topic, I tried another coil which I had wound prior to this 3.5" (32AWG). It's 2-3 inches longer, and 4.5" in diameter, but wound with 24AWG. Results were not as good (spark length wise). The inductance on the LCR was a bit lower (only 17mH vs. 27mH on the 3.5" coil). Is that result normal, or could that be symptom of something going on? My basic understanding (not sure if that applies too all types of TC's) is that the spark length (assuming equal voltage among other things) will depend on the ratio of secondary:primary inductance. So starting with a lower inductance value will be difficult to compensate.

With a regular (non-DR) TC, if we want to optimize for spark length, we need to maximize inductance of the secondary and primary to secondary coupling. However, increasing coupling would mean more turns on the primary, hence higher primary inductance which contributes to lowering the inductance ratio. Is there a sweet spot to shoot for when coiling for a non-DR TC?

Offline davekni

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Re: First SSTC build - some questions
« Reply #21 on: December 30, 2020, 05:32:03 AM »
For parallel planes, please look back at the link I posted in reply #14.  If you still have questions, ask again.

Once GDT output wires are twisted and all soldered directly to IGBT pins, the ringing will not couple much to gate waveforms.  It may still look bad depending on how the scope probe is connected.  Somewhere here there is a post about instructions for proper scope probing technique.  Still, the scope probe and ground lead will have a large loop area for picking up ring signals than properly twisted and connected GDT leads.  In other words, connect the GDT well, then focus on reducing the Vce spike voltage.

Concerning maximum spark length, there are many factors.  Others here likely know more of what to recommend.  You can increase coupling by spacing primary coil turns vertically.  That will reduce inductance.  Then add a turn or whatever is necessary to get inductance back.  Use JavaTC to test options before bothering to try them.  Stretching the primary higher does increase the risk of arcing from secondary to primary.
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Offline zytra

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Re: First SSTC build - some questions
« Reply #22 on: December 30, 2020, 06:18:22 AM »
Thank you. Now that I have the GDT wires twisted and soldered on the IGBT themselves I'll focus on Vce. Actually based on your post, I think things are looking pretty good, I was only concerned about the degradation of the gate on the scope but that could very well be that I had to move the probes when I soldered the cap/moved the wires and that now the probes are picking up junk. Vce looked a lot better since the cap was added. Twisting the GDT wires and soldering them to the IGBT didn't help or at least not as significantly as adding the cap did.

The only you recommended I haven't done yet was adding a short line between the high side emitter to the low side collector. That's a bit more invasive and I'll need to more access to do that. Also, when I think about it, current is (should) never flowing from the high side emitter to the low side collector, so what makes this still a good thing to do?



I took a second look at your low parasitic inductance how-to post. At first I thought you were mainly describing a way of building a bridge for those without access to copper clad, bus bar and the like. But after that second read, I'm just realizing how clever the 2-horizontal, 2-vertical layout/arrangement is! My comment/question on polarity was answered on its own: I was worried about the induced capacitance created by 2 plane conductors separated by an insulator, but with your arrangement the positive and negative are always side by side rather than facing each other separated by insulator. I think I will rebuild my half bridge tomorrow following your technique, I'll have to cut part of my heatsink to make it fit in the enclosure. The only drawback is that it makes for a crowded gate pin.

The SSTC2 Half bridge circuit has only 2 (large) capacitors and they're part of the doubler circuit. In my build both of these caps are connected to the bus bar but through a pair of 6" wires. They're just too big to make that connection shorter and still fit in a decent size enclosure. The issue is that they're part of the doubler circuit and their center tap is also the connection to the primary coil, so if I was to add two fast film capacitor on my new "2 by 2" half bridge, would that be ok? I am attaching a schematic of what I suggesting:
- have both primary coil connection from the "2 by 2" half bridge (like yours)
- keep the 2 large electrolytic capacitor that are part of the doubler
- add 2 film capacitors (one on the high side, and one on the low side)

My question is do I need to keep a line connecting the center taps of the 2 electrolytic caps and the 2 new film caps?

Note: I added (some of) the modifications I made to the original circuit so far thanks to your help:
- moved the cap on the other side of the clamping diodes
- added a 10k resistor across the first inverter channel
- added a 1uF film capacitor across Vbus directly soldered on the IGBT's leads
- not shown, but I have 2 opposing zener diodes and a TVS diode across gate and emitter on both IGBT's
« Last Edit: December 30, 2020, 07:18:47 AM by zytra »

Offline davekni

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Re: First SSTC build - some questions
« Reply #23 on: December 30, 2020, 07:20:25 PM »
Twisting GDT wires directly to the IGBTs is primarily to protect the gates from transients that could damage the IGBTs (punch through gate oxide due to excess voltage).  It isn't surprising that there wasn't any obvious change in scoped signals.  (For FETs, clean twisted-pair gate wiring is more critical.  FETs are often fast enough to react to the gate spikes, causing multiple high-frequency output transitions.)

Two reasons for a low-inductance connection between low-side collector and high-side emitter.  First, momentary conduction between the two IGBTs does occur when voltage lags current phase, as in the one plot you posted that included current.  When the low-side IGBT turns on, the high side IGBT is off.  However, current is flowing through the high-side diode within the IGBT package.  The diode draws a spike of current as it turns off (stored minority-carrier charge).  As that current spike ends, voltage on the low-side IGBT spikes up due to wiring inductance between the two.  Same happens when the high-side IGBT turns on.  (I have one H-Bridge using IGBTs with relatively-slow diodes.  Even with my 2x2 layout, just the IGBT lead inductance makes problematic spikes.)

The other reason:  With phase-lead and proper dead-time, no current flows through both IGBTs simultaneously.  However, current does rapidly switch from flowing through one IGBT to flowing through the other IGBT.  Whichever IGBT is turning off will see a voltage spike due to the inductance to the other IGBT.  If the two IGBTs are tightly coupled, then the other IGBT's diode clamps the voltage.

There is no need to connect the two capacitor center-taps.  Another option is to return the primary coil to the bulk-cap center tap.  Then you can use a single film capacitor across VBus (and eliminate the plane split on one side of the 2x2).  That adds a bit of wiring inductance in series with the primary coil.  No fast current switching there, so no problem.  BTW, multiple smaller caps in parallel will further lower inductance compared to a single larger film cap.  When I rebuilt that 2x2 example into a full-bridge, I added eight 10nF 630V C0G ceramic caps between VBus+ and VBus- bridging the plane split.  That made switching spikes even lower.
David Knierim

Offline zytra

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Re: First SSTC build - some questions
« Reply #24 on: December 30, 2020, 08:44:31 PM »
Thanks Dave.

With the 2x2 layout, I'll have, like you, 2 capacitors almost on the IGBT's leads. I won't wire the center tap of these 2 caps to the large bulk ones if not needed. If you have any tip on sizing the 2 caps on the 2x2 feel free to share - I know they need to have the lowest ESR possible but capacity wise I'm not sure. When those 2 are added, do I still need the one you suggested I add (across Vbus).

With that layout the high-side emitter and low-side collector will be naturally connected.



I did play with JavaTC a little bit to see how the number of turns on the primary impact coupling and primary inductance. I had 7 turns yesterday, the peak current measured yesterday didn't exactly match the number calculated off the reactance and half bus voltage though. I think the energy transfer doesn't apply to SSTC but I still plotted it just in case.

But as expected, increasing the number of turns does increase primary inductance, reactance and coupling.

I then tried reducing the number of turns to 6, 5 and 4 and couldn't obviously much of a change in the overall behavior or arc length. I actually wouldn't be able to say which of 4, 5, 6 or 7 turns did better, arc length wise. With the help of the oscilloscope I could probably identify which one had the highest peak current though. I didn't test all the way up to full bus voltage either, so these tests are probably not ideal.

Offline davekni

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Re: First SSTC build - some questions
« Reply #25 on: December 30, 2020, 09:17:45 PM »
I was suggesting you could add one across VBus instead of the other two.  Then it becomes 1x2 (1 plane for half-bridge output on one side and two planes for VBus+ and VBus- on the other side).  That might make it small enough to avoid cutting your heatsink?  Works if your coil returns to the center of the bulk caps.

If you use the 2x2 version with two caps and return the primary coil to that center tap (and don't connect to the bulk center tap), then you can eliminate the 4.7uF cap that is in series with the primary coil.  These two caps will serve that purpose too.  Something around 4.7uF should be fine for these two caps.  Might get away with smaller ones down to 1uF depending on how much current you will be running.  Larger doesn't hurt.

I have seen a couple DRSSTC builds here that by bad luck had the local H-Bridge film capacitors resonate with the wire inductance back to the bulk caps at 1x or 2x operating frequency.  That is problematic, as it causes high VBus voltage swings.  Not knowing your wiring inductance, I can't say what exact value to avoid.  Just scope VBus at the bridge to make sure there isn't a large AC signal.

At your ~160kHz frequency, angular frequency (2*PI*F) is roughly 1MHz.  Thus two 1uF caps in series would be 0.5uF or 2 ohms reactance across VBus.  If VBus wires were very long (high impedance) from bulk caps, then 50A would make 100V ripple.  The wires are likely short enough to be under 2 ohms reactance at operating frequency.  If wire reactance were also exactly 2 ohms, that is the problematic resonance that I'd mentioned.  (Or if they were both 1 ohm at 2*F.)

Yes, I think JavaTC is aimed at spark-gap coils.  Still quite useful for inductances, coupling, and resonant frequency estimation.

In general I'd go for the most primary turns that doesn't hurt performance.  That will reduce primary current, so reduce IGBT heating and all the voltage spikes that are caused by current switching.  If you want to use a more quantitative measure of performance, measure secondary current.  Add a small resistor in series with the secondary, or in series with the ground lead of the feedback CT.  Scope voltage across that resistor.
David Knierim

Offline zytra

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Re: First SSTC build - some questions
« Reply #26 on: December 30, 2020, 10:26:03 PM »
I'll stick with you 2x2 as is. The only thing I might not need to keep is the 330 uF cap (that's across Vbus) considering the 2 bulk capacitors are not far away. I'll have to check but I don't think I have a lot of >350V capacitors in this size.

The heatsink is way oversized anyway (I was experimenting with slayer exciters prior to starting this build and I killed a bunch of mosfets). I realized after getting the SSTC up and running that the interrupter significantly reduces the stress on the mosfet, and with moderate duty cycle, they don't get hot at all. I am not looking for high duty/continuous operations. So scaling the heatsink down shouldn't be a problem. I'll get keep the fan in the enclosure to circulate and perhaps use smaller heatsinks on both IGBT's, I am keeping the thermistor so I'll have an eye on the temperature anyway.

I played a bit more with primary turns, and increased it all the way to about 15 turns. 7 will remain a good number a turns as I experienced secondary/primary arcs with as little as 10 turns without even pushing the variac more than half way. 15 turns yielded discharges on primary with only 30-35VAC.

I'll try to turn this coil into a DRSSTC next week, just need to build the driver.

Edit: Added some pics of the 2x2 layout I'm working on. It's actually using 1" wide copper (1/16" thick), 4 strips all 2.25" long. That makes for 2.25x2.25 footprint. The insulation later is 1/8" G10 I had lying around. Overall it's 2.25x2.25x0.25 - a bit overkill but that's what I had around me.
« Last Edit: December 31, 2020, 03:15:09 AM by zytra »

Offline davekni

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Re: First SSTC build - some questions
« Reply #27 on: December 31, 2020, 03:53:34 AM »
Looks great, but that thick copper is going to make soldering very difficult.  It will sink heat away from the iron faster than the iron can supply it.  Might need a micro-torch.  The 1/4" total thickness will require more IGBT lead bending, but that is a minor issue compared to soldering.

If you do fit an electrolytic on the 2x2, that should prevent any issues of resonance with wiring inductance.  Larger capacitance will lower resonant frequency and impedance, and the cap's ESR will damp whatever resonance might have still been there.
David Knierim

Offline zytra

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Re: First SSTC build - some questions
« Reply #28 on: December 31, 2020, 04:39:00 AM »
I had to solder components to 1/8" copper bus bar a while back (twice the thickness) and didn't have too much problem, so hopefully it will be the case here too. I'm working on the new layout in the enclosure and I think I should be able to fit an electrolytic directly on the 2x2.

I might be even able to just re-layout the rectifier/doubler and have the 2 large bulk capacitor bolted on the bus bar which would simplify things a lot.

Thanks!

Offline zytra

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Re: First SSTC build - some questions
« Reply #29 on: December 31, 2020, 05:52:12 AM »
I piggybacked on your 2x2 concept and came up with an interesting idea to significantly simplify my particular configuration.
Basically I was trying to implement the copper/G10 concept to the rectifier and was trying to "attach" it to the 2x2 I made this afternoon. Then I realized that it would be a lot simpler to make the 2x2 longer and slightly wider to add one copper trace, this way everything would be on a single board.

I've sketched up the idea off a screenshot of my CAD. I think with this idea I could probably keep the DC blocking cap (and most of the original circuit), and perhaps just keep the 1uF I added across +/- Vbus.

What do you think?

Edit: Modeled it quick and dirty in CAD
Edit: was able to decrease the size substantially by relocating the bulk capacitors
« Last Edit: December 31, 2020, 07:34:05 AM by zytra »

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Re: First SSTC build - some questions
« Reply #30 on: December 31, 2020, 06:41:10 PM »
Yes, that is great!  Your 3D views are helpful for visualization.  It's looking like laminated-copper structures used on commercial power systems.

I do suggest extending the copper shapes to cover as much area as possible.  In other words, minimize gap widths except for what is needed for voltage withstand.  The gaps between copper are where magnetic field lines sneak through, creating parasitic inductance.  Of course, exactly as drawn is still way better than wires.

The point of my example is overlapping copper planes with minimal gaps (especially minimal gaps that overlap gaps in the other layer).  The overlapping planes can be bent into 3D shapes to accommodate mechanical requirements.  I've seen a couple coil builds that have a 90 degree bend with overlapping copper planes for bulk caps mounted horizontally.

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Offline zytra

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Re: First SSTC build - some questions
« Reply #31 on: December 31, 2020, 07:23:27 PM »
Thank you, yes, I can easily reduce the gap between two adjacent buses.
In this particular case, the enclosure was designed/printed to fit the caps vertically, so I don't need to put them parallel to the board and as such they'll have the closest path to the buses possible.

I'll try to build that today, and even perhaps test it!

Offline zytra

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Re: First SSTC build - some questions
« Reply #32 on: January 01, 2021, 01:00:54 AM »
I got the board done, and it's ready for assembly.
I found 1/32" copper and 1/16" G10, so it's a bit thinner than the one from yesterday

I need to figure out a plan for the gate line resistor/diode and the gate/drain protection tvs/zener.
« Last Edit: January 01, 2021, 01:11:41 AM by zytra »

Offline davekni

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Re: First SSTC build - some questions
« Reply #33 on: January 01, 2021, 01:10:52 AM »
Looks good.

For gate circuitry, I usually make a small board (dremel-tool cut copper-clad usually) that extends roughly vertically or angled back over the IGBT bodies.  Gate leads bend back to solder to that board, as do separate emitter wires.  Usually easiest to solder the emitter wires onto the IBGTs close to the package before attaching to the 2x2 power board.  My second post of that 2x2 example shows this, where I turned it into a full-bridge.

Not being mechanically-skilled, my gate boards usually have no support other than the gate and emitter leads.  (I use somewhat heavy wire for the emitter connection just for rigidity, not because it carries much current.)  You will likely be more clever.
David Knierim

Offline zytra

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Re: First SSTC build - some questions
« Reply #34 on: January 02, 2021, 04:00:33 AM »
Happy new year!

I split and trimmed my original PCB. Its layout was actually pretty decent for what I wanted to do.
I pulled a couple pins and replaced them (upside down) with 90D headers which gave me the support I was looking for on the opposite side of the IGBT gate pin.

I tinned the 2x2+1 board and added the 2 diodes and the wires from the AC and those to the coil. I kept the DC blocking cap in this configuration and I'll figure something out for the heatsink later. I'll add the bleed resistor directly across the capacitor screws.

I wanted to try it today so I went ahead and hooked up a signal generator on the input (removed the inverter first) but couldn't get anything out of the driver. Probing the input shows no problem, however probing the enable pin shows nothing is happening there. I think the issue is the phototransistor, or the transistor that's feeding the enable pin. Not a big fan of the IF-E91A/IF-D92 combo, my PCB is a bit crowded and couldn't find a hold-down screw. Anyway that shouldn't be too difficult to fix.

Can't wait to see how much cleaner this layout will be on the scope.

Cheers
« Last Edit: January 02, 2021, 05:15:09 AM by zytra »

Offline davekni

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Re: First SSTC build - some questions
« Reply #35 on: January 02, 2021, 08:36:08 PM »
Looking great!

I've had good success with IF-D92 at 660nm.  Haven't used the IF-E91A (930nm) emitter.  PMMA fiber has lower attenuation at 660nm.  I've used PLT133/T6A for transmission as well as 660nm 5mm LEDs.  Newer LEDs are much more efficient.  Drilling a hole in the end of a 5mm LED and gluing the end of a fiber into it couples much more light than PLT133/T6A or any of the other transmitters I've seen.
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Offline zytra

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Re: First SSTC build - some questions
« Reply #36 on: January 03, 2021, 01:48:27 AM »
I pulled the driver out of the enclosure and powered it outside and everything looked good. I'm guessing perhaps the fiber had moved and wasn't properly aligned (the plastic cap around the phototransistor can move up and down). I received some ST type emitter/receiver (those used in the UD2.7), so I'll probably upgrade to those soon once I figure out the direction I'll be heading for the DR "upgrade".

Anyway I was able to verify polarity of the GDT, and then proceeded with some tests. Had to flip the feedback, and that was it.
The attached screenshots show were taken at various bus voltage as I was increasing the output of the variac.

1. I could immediately see the benefits of this parallel plane layout. This is without the extra bus cap that helped cleaned things up a few days ago.

2. Other than for the last screenshot (110VAC), everything looks really good. That last screenshot has some "waves" which I can't really explain. Note that the cyan line is a current probe (clamp) so I think it's fully isolated from the other 2 channels (grounded to the emitter of the high side IGBT).

3. What perhaps struck me the most is the current values. If you scroll a few posts up you'll see the values I was measuring and I was getting over 30A p2p at roughly 60V on the bus. On that last screenshot today, I'm at less than 10A p2p at over 300V on the bus. I'll double check everything but that seems rather odd!


edit: On a side note I was giving some thought if that 2x2+1 layout could be upgraded to a full bridge without adding too much complexity. And I think I found an elegant way to do just that. Basically, on my top view image with the colors (black, red, cyan, orange, green), all I would need to do is to invert the positions of the green and orange strips. By havin the green strip "alone" in the center, the orange strip would be properly located for edge mounting of additional IGBT's.
« Last Edit: January 03, 2021, 02:19:13 AM by zytra »

Offline davekni

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Re: First SSTC build - some questions
« Reply #37 on: January 03, 2021, 03:57:16 AM »
The 2x2 design works quite well for full-bridges.  I've made many full-bridges and only a couple half-bridges.  In a later reply to the example I'd posted I convert it to full-bridge.  (No voltage-doubling incorporated directly, so it's just 2x2 without an extra center strip.  Your center-strip version should work well too.)

Definitely something odd about the current.  It doesn't rise proportional with voltage - possible if arc loading is increasing at high voltage/current.  Also odd that a new relatively-low ring frequency shows up only at higher voltage.  There are often issues with high-frequency high-voltage on the scope ground even with a floating scope.  I'd suggest scoping the low-side gate and collector with ground on the low-side emitter rather than high-side.

The previous high current at 60V also seems a bit odd unless the primary was in resonance (ie. small value for the "4.7uF" cap in series with the primary).  Could be possible with a high-Q secondary and high coupling.  But that still leaves the question as to why it changed.

Are you measuring current with a commercial clamp-on current probe?  If so, is it good to 160kHz and high-enough current?
David Knierim

Offline zytra

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Re: First SSTC build - some questions
« Reply #38 on: January 03, 2021, 04:09:31 AM »
Yes, your second posts showed the full bridge upgrade which pushed me to think of a way around to get the other 2 transistors to fit on the opposite side of the first 2.

According to JavaTC my coupling is probably between 0.30 and 0.35 or so.

The current probe is a cheap one but with decent reviews, it should be alright at my resonance frequency: https://www.banggood.com/Micsig-ACDC-Current-Probe-CP2100A-800KHz-10A-Maximum-Measurable-Current-100Apk-70_7Arms-DCACpk-p-1625010.html?rmmds=myorder&cur_warehouse=USA It's rated for 10A/100A and I've got it set to 100A.
I haven't even pulled it out of the system since the measurements a couple days ago.

I'll probe the low side IGBT and move the ground clip to the low side emitter.

If there was any resonance taking place on the primary wouldn't we see other obvious signs on the Vce trace?


edit: on the full bridge question, yes I didn't realize that the doubler would need to be dropped unless I found some much higher voltage IGBT.
« Last Edit: January 03, 2021, 04:25:57 AM by zytra »

Offline davekni

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Re: First SSTC build - some questions
« Reply #39 on: January 03, 2021, 04:46:37 AM »
That current probe looks fine.  Are you sure your scope scale is set correctly?  It outputs 10mV/A on the 100A setting.  If the scope is set to 5V/div for a 10x probe (as I think it shows in the images), that's 500mV/div or 50A/div.  Then your current is hitting 80App at 340Vbus.

Changing from half-bridge to full-bridge doesn't change the required IGBT voltage rating.  It does double output voltage, which will double current for a given load impedance.  I've just never happened to integrate voltage doubling with a bridge, preferring to keep the "high" frequency stuff separate from the line-frequency circuitry.  Also allows reuse of power supplies (voltage doubler or other) among projects.
David Knierim

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Re: First SSTC build - some questions
« Reply #39 on: January 03, 2021, 04:46:37 AM »

 


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January 23, 2021, 02:35:18 PM
post Re: New projet OmegaDR
[Dual Resonant Solid State Tesla coils (DRSSTC)]
paulj
January 23, 2021, 11:27:50 AM
post 8 ft spark french tesla coil
[Spark Gap Tesla Coils (SGTC)]
paulj
January 23, 2021, 11:00:37 AM
post Re: High voltage transformer for neon bombarding.
[Transformer (Iron Core)]
klugesmith
January 22, 2021, 11:23:39 PM
post Re: Paralleling IGBT bricks for H-bridge
[Solid State Tesla Coils (SSTC)]
davekni
January 22, 2021, 08:09:18 PM
post Re: ZVS driven Plasma Ball (w/ segmented PTFE Secondary)
[Transformer (Ferrite Core)]
zytra
January 22, 2021, 06:49:26 PM
post Re: High voltage transformer for neon bombarding.
[Transformer (Iron Core)]
AndreasVE
January 22, 2021, 11:16:43 AM
post Enclosure design considerations for a DRSSTC?
[Dual Resonant Solid State Tesla coils (DRSSTC)]
GrantV
January 22, 2021, 10:05:28 AM
post Re: Paralleling IGBT bricks for H-bridge
[Solid State Tesla Coils (SSTC)]
Patrik
January 22, 2021, 08:47:11 AM
post Re: Paralleling IGBT bricks for H-bridge
[Solid State Tesla Coils (SSTC)]
davekni
January 22, 2021, 06:19:21 AM
post Re: ZVS driven Plasma Ball (w/ segmented PTFE Secondary)
[Transformer (Ferrite Core)]
davekni
January 22, 2021, 06:03:43 AM
post Re: induction heater issues
[Electronic Circuits]
davekni
January 22, 2021, 05:45:21 AM
post Re: Anybody got some tips for releasing a product?
[General Chat]
AeraCura_
January 22, 2021, 05:22:44 AM
post Re: Anybody got some tips for releasing a product?
[General Chat]
octopus1
January 22, 2021, 04:58:04 AM
post Re: compact midi interrupter
[Computers, Microcontrollers, Programmable Logic, Interfaces and Displays]
AeraCura_
January 22, 2021, 03:39:07 AM
post Re: induction heater issues
[Electronic Circuits]
petespaco
January 22, 2021, 03:18:53 AM
post Re: High voltage transformer for neon bombarding.
[Transformer (Iron Core)]
klugesmith
January 22, 2021, 01:52:12 AM
post Re: 833A Maximum Dissipation Ratings
[Vacuum Tube Tesla Coils (VTTC)]
kyledellaquila
January 22, 2021, 01:26:13 AM
post Re: induction heater issues
[Electronic Circuits]
aes92000
January 22, 2021, 01:19:24 AM
post Anybody got some tips for releasing a product?
[General Chat]
TMaxElectronics
January 22, 2021, 12:46:22 AM
post Re: compact midi interrupter
[Computers, Microcontrollers, Programmable Logic, Interfaces and Displays]
TMaxElectronics
January 22, 2021, 12:41:44 AM
post Paralleling IGBT bricks for H-bridge
[Solid State Tesla Coils (SSTC)]
Patrik
January 21, 2021, 02:10:48 PM
post Re: Welcome new members, come say hello and tell a little about yourself :)
[General Chat]
Patrik
January 21, 2021, 11:31:39 AM
post High voltage transformer for neon bombarding.
[Transformer (Iron Core)]
AndreasVE
January 21, 2021, 10:53:15 AM
post Re: ZVS driven Plasma Ball (w/ segmented PTFE Secondary)
[Transformer (Ferrite Core)]
zytra
January 21, 2021, 08:36:50 AM
post Re: induction heater issues
[Electronic Circuits]
davekni
January 21, 2021, 05:10:27 AM
post Re: 4HV gone?
[General Chat]
Patrick
January 21, 2021, 05:08:54 AM
post induction heater issues
[Electronic Circuits]
aes92000
January 21, 2021, 04:19:43 AM
post Re: Help for people buying the "12-48 Volt 1800/2500 Watt ZVS induction Heater"
[Electronic Circuits]
hightemp1
January 21, 2021, 03:00:50 AM
post Re: ZVS driven Plasma Ball (w/ segmented PTFE Secondary)
[Transformer (Ferrite Core)]
zytra
January 21, 2021, 02:21:32 AM
post Re: ZVS driven Plasma Ball (w/ segmented PTFE Secondary)
[Transformer (Ferrite Core)]
davekni
January 21, 2021, 01:23:12 AM
post Re: ZVS driven Plasma Ball (w/ segmented PTFE Secondary)
[Transformer (Ferrite Core)]
zytra
January 21, 2021, 01:12:01 AM
post Re: Weird optocoupler in guitar amplifier
[Electronic Circuits]
davekni
January 20, 2021, 11:51:48 PM
post Re: ZVS driven Plasma Ball (w/ segmented PTFE Secondary)
[Transformer (Ferrite Core)]
davekni
January 20, 2021, 11:47:09 PM
post Re: Weird optocoupler in guitar amplifier
[Electronic Circuits]
TMaxElectronics
January 20, 2021, 11:19:41 PM
post Re: Cap Identification 64KV
[Capacitor Banks]
johnnyzoo
January 20, 2021, 08:43:54 PM
post Re: Flyback transformer power capability
[Transformer (Ferrite Core)]
SteveN87
January 20, 2021, 08:40:45 PM
post How To Build Flight Case and Transport Box
[Laboratories, Equipment and Tools]
Mads Barnkob
January 20, 2021, 08:25:37 PM
post Re: Weird optocoupler in guitar amplifier
[Electronic Circuits]
davekni
January 20, 2021, 08:24:54 PM
post Weird optocoupler in guitar amplifier
[Electronic Circuits]
TMaxElectronics
January 20, 2021, 07:02:04 PM

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