Author Topic: DRSSTC inverter vs. secondary impedance inequality discussion  (Read 1126 times)

Offline Uspring

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DRSSTC inverter vs. secondary impedance inequality discussion
« on: August 10, 2017, 12:44:12 PM »
Mads wrote:
Quote
As from https://highvoltageforum.net/index.php?topic=90.msg462#msg462 we have the equation: Vmax/Imax < k  / (2*pi*f*C)

That's a generous upper limit on the primary capacitance. It's assuming perfect tuning and a choice of secondary L best matched to arc loading. My coils run best at about half the limit. If you choose a too big primary C, i.e. a low impedance primary, then you will run into overcurrent terminating the burst. A small C will not allow to push as much current into the primary as you want to. Detuning by choosing different L taps can compensate for this. That's easier than "tapping" the MMC.
« Last Edit: August 15, 2017, 09:21:10 AM by Mads Barnkob »

Offline Mads Barnkob

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Re: Re: The Procrastinator's DRSSTC
« Reply #1 on: August 10, 2017, 01:41:47 PM »
Mads wrote:
Quote
As from https://highvoltageforum.net/index.php?topic=90.msg462#msg462 we have the equation: Vmax/Imax < k  / (2*pi*f*C)

That's a generous upper limit on the primary capacitance. It's assuming perfect tuning and a choice of secondary L best matched to arc loading. My coils run best at about half the limit. If you choose a too big primary C, i.e. a low impedance primary, then you will run into overcurrent terminating the burst. A small C will not allow to push as much current into the primary as you want to. Detuning by choosing different L taps can compensate for this. That's easier than "tapping" the MMC.

That is also what I tried to shed a bit of light on in the last reply, that there is no real answer, but a bundle of entwined and interdependent equations which will still point in each their direction :)

Even what I suggested in the last thread, might be a too low inductance primary as it would hit peak current at ~60us?
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Offline Uspring

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Re: Re: The Procrastinator's DRSSTC
« Reply #2 on: August 11, 2017, 12:46:33 PM »
The inequality

Vmax/Imax < k  / (2*pi*f*C)

is derived from a steady state consideration, i.e., where does primary current end up after a long burst, when everything has settled down to constant values.

Quote
but due to the low primary inductance, we might hit 600A real fast,

I agree. Primary rampup is a transient situation. Before a steady state is reached, primary current has to reach a significant level, then energy has to be transferred to the secondary, then the arc has to grow to its final length. Due to the slowness of the latter 2 processes, there might be a considerable overshoot of primary current. I've seen that in my coils. Slowing down rampup by increasing primary impedance avoids that to some extent. Steve Wards older coils as far as specs are available as well as mine seem to roughly run at

Vmax/Imax ~ 0.5 * k  / (2*pi*f*C)

Here are some values for your coils. I couldn't find any data on k, though.

DRSSTC  Vmax/Imax                   1 / (2*pi*f*C) in ohms
#1              0.7                                    5.2
#2        0.28, 0.5  (Rev1 and 2)           6.5
#3              0.5                                    5.2
#4              3.6                                    33

mostly there is a factor of about 0.1 between these values. That would correspond to 0.5*k for a k of 0.2 in the above equation.


Offline Mads Barnkob

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Re: DRSSTC inverter vs. secondary impedance inequality discussion
« Reply #3 on: August 15, 2017, 09:45:22 AM »
I think it makes sense that my 4 coils are very even and leans up against Wards numbers, as that is how I learned to build Tesla coils, from Wards website :)

I do not believe that I have designed for as high a coupling as 0.2, but more like in the range of 1.3 to 1.6. So corrected to 0.15

DRSSTC  Vmax/Imax                   0.5 * k / (2*pi*f*C) in ohms
#1              0.7                                    0.39 (was before I had proper measurement equipment)
#2        0.28, 0.5  (Rev1 and 2)           0.49 (this has a long steady state operation)
#3              0.5                                    0.39 (never had time to measure it properly, due to size its never practical, dummy load measurements are not useful)
#4              3.6                                    0.3 (impossicoil, got no idea about this bastard :) 

We agree that low impedance coils really never operate in a steady state? That the fast ramp up of current and then turn off, it is not getting there.

But in the small #2 http://kaizerpowerelectronics.dk/tesla-coils/kaizer-drsstc-ii/ it has a very steady ending from the long on-time, resembling a... spear head.
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Offline Uspring

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Re: DRSSTC inverter vs. secondary impedance inequality discussion
« Reply #4 on: August 16, 2017, 12:32:48 PM »
Quote
We agree that low impedance coils really never operate in a steady state? That the fast ramp up of current and then turn off, it is not getting there.

Yes. And an OCD turn off will cause much of the energy stored in the primary tank to return into the bus caps and not ending up in the arc. So it is not desirable.
The scope shot shows, that in the steady state at the end the power input to the coil is much reduced compared to the bridges capabilities. The OCD is set much higher than the current at the end, since the burst wouldn't have continued over the initial overshoot of current. That can be improved by either upper pole operation or possibly, by pulse skipping, which both avoid the overshoot.

I'm wondering about the 0.5 * k / (2*pi*f*C) value for DRSSTC4. That would imply a k of 0.02 (?)

Another remark to Procrastinators coil: It looks like he tuned primary and secondary res to be quite close (initially). That defeats the purpose of upper pole operation, since once secondary fres drops below primary fres, the upper pole won't follow the secondary fres downwards as the arc grows. It will stay up high, blocked by the primary fres.

Offline Mads Barnkob

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Re: DRSSTC inverter vs. secondary impedance inequality discussion
« Reply #5 on: August 16, 2017, 01:36:24 PM »
I do not even know what the coupling of DRSSTC4 is, its folded primary does not really make it fit into any calculators I know of.

DRSSTC 4      
Vbus   320   
Max current   50   
Fresonance   100000   
Coupling   0,3   
C    0,047   uF
      
Vmax/Imax   <   k*sqrt(L/C)
8,148733086      10,15882615

That is properly a better estimate
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Re: DRSSTC inverter vs. secondary impedance inequality discussion
« Reply #5 on: August 16, 2017, 01:36:24 PM »

 


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