Author Topic: Class E SSTC Topology  (Read 828 times)

Offline ZakW

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Class E SSTC Topology
« on: March 31, 2020, 09:15:23 PM »
Hello Everyone,

EDIT: I have been updating the thread, please see below.
 
I am currently building Steve Ward's class E SSTC. https://www.stevehv.4hv.org/classEsstc.htm.


I am finishing the coil up and building it onto a base which has changed my tuning a lot. I am in the process  of re-tuning the coil and had a few questions regarding its design.

My main question: I cant find the answer on google...Why is Steve's class E design different than the typical class E circuit? The RCF, C2,L2, and R(load) are not in his design. Thévenin's theorem?


Second question: Why did Steve choose to connect his primary to + of the supply and the DRAIN of the MOSFET, instead of making the output R(load) and ground? How does this change how the circuit operates?

How can the coil be tuned using diagrams like these: If the components are omitted from the design?


Lastly here are some pictures of my project so far. I was planning on posting it here so I could share my results and get feedback on how to improve my future designs. Yellow is Drain voltage, purple is Gate drive.

The base its built on:


My previous tuned wave form (generated very little heat at full power 90v): (The coil was not running on 90v during the scope picture)


Here is a 7-8in arc when the coil was tuned:


Old tuning:


Current tuning: Needs work! I am not sure what is causing the Drain voltage do behave like that. I noticed the gate voltage is ringing really high, I need to increase the resistor I am using by a few ohms. The FET I am using is rated for 25V Max gate voltage.


Thank you,
Zak

« Last Edit: April 05, 2020, 12:31:07 AM by ZakW »

Offline Weston

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Re: Class E SSTC Topology
« Reply #1 on: March 31, 2020, 10:13:13 PM »
Cool coil, I like the acrylic base! Nice to see some new discussion on class E coils, I have done a lot of work in this area.

RF power components are expensive so Steve Ward's design makes some simplifications to reduce the required components.

The classical class E circuit assumes the load is purely resistive and uses the load network (C2 and L2) to block harmonics and provide the inductive loading needed for zero voltage switching. L1 is used as a choke to supply power and acts as a constant current source.

Unlike a typical RF amplifier, which drives a 50 ohm resistive load, the tesla coil itself is a high Q filter network. Steve Ward's design uses the secondary itself to replace the load network consisting of C2 and L2. The lack of a capacitor on the primary allows the primary to be used as a RF choke. I have drawn out an equivalent circuit which looks more similar to the classical class E design.



There is one operation difference between this design and a classical class E design. Typically class E amplifiers are designed with a RF choke of a very large value so it acts like a constant current source. However, the primary inductance is typically lower impedance than this. This gives you a modification of class E which does not have zero dv/dt turn on but still has zero voltage turn on. You can see this in your waveforms. We don't really have to worry about zero dv/dt turn on for these switching frequencies though so its not an issue. The tuning mostly stays the same but if you are interested, this paper probably describe the behavior the best: https://www.rle.mit.edu/per/wp-content/uploads/2015/03/Roslaniec-Design-of-Single-Switch.pdf

Offline ZakW

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Re: Class E SSTC Topology
« Reply #2 on: March 31, 2020, 11:03:36 PM »
Hello Weston!

Thank you for the reply, you answered both of my questions ;D !

Your diagram makes a lot sense, thanks for drawing that out. I did not think about it like that, and finding material on SSTC application vs RF amps for radios is hard to find. I will give your linked PDF a read as well. Thats one of the things I would like to explain when I complete my project. I figure, since I am doing all of this research and trial and error I can share my findings and help others build similar coils.

Hopefully I can get back in the garage and tune it some more today.

Offline Weston

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Re: Class E SSTC Topology
« Reply #3 on: April 01, 2020, 07:01:51 AM »
In regards to the tuning, Steve Ward's explanation on the page for his class E coil is pretty on point. If you are getting that hump before turn on, lower coupling (lower the primary in relation to the secondary). If you are getting the voltage going to zero before turn on, increase the capacitance across the mosfet or increase the number of primary turns (increasing the number of primary turns will also lower power output for a given supply voltage).


Your first waveform is close to optimal tuning, your second waveform needs more capacitance or primary turns, and the third one looks like the coupling is way too high.

One thing to note for tuning is that the the spark discharge provides most of the loading (and the MOSFET capacitance goes down with voltage) so a tuning that is correct at high power will look wrong at low power or without a spark discharge.

In regards to the gate ringing on the third waveform, given the lack of it in the other waveforms I bet that is related to the hard turn on. It could be real, it could be an artifact of how you are probing the gate voltage. The high dI/dt when the switch turns an discharges that capacitance on is going to induce voltage on the source lead. I would not be particularly worried about it, its more of a symptom than a cause of the poor performance with the current tuning. If you want to improve the gate waveforms shortening the gate lead would also help.

Offline ZakW

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Re: Class E SSTC Topology
« Reply #4 on: April 01, 2020, 09:47:42 PM »
In regards to the tuning, Steve Ward's explanation on the page for his class E coil is pretty on point. If you are getting that hump before turn on, lower coupling (lower the primary in relation to the secondary). If you are getting the voltage going to zero before turn on, increase the capacitance across the mosfet or increase the number of primary turns (increasing the number of primary turns will also lower power output for a given supply voltage).

You're absolutely correct. I have referenced his website a lot for tuning help. Thing is I think the only thing that has really changed since attaching the components to the base is my stray inductance (from long connections to the primary and voltage doubler). I had really good results with 1T primary. So I am trying to find the magic amount of stray inductance via air wound coil and adjust my capacitance across the MOSFET.

Your first waveform is close to optimal tuning, your second waveform needs more capacitance or primary turns, and the third one looks like the coupling is way too high.

I was aiming for slightly over tuned so the arc at full power will pull it to ZCS, but did not capture a good scope shot of those adjustments. I posted the second scope shot for reference that I indeed was successful in tuning the coil (small victory for me ;D)

One thing to note for tuning is that the the spark discharge provides most of the loading (and the MOSFET capacitance goes down with voltage) so a tuning that is correct at high power will look wrong at low power or without a spark discharge.

I have noticed this. Since I power it with a variac I make the needed adjustments as I work my way up to higher power levels.

In regards to the gate ringing on the third waveform, given the lack of it in the other waveforms I bet that is related to the hard turn on. It could be real, it could be an artifact of how you are probing the gate voltage. The high dI/dt when the switch turns an discharges that capacitance on is going to induce voltage on the source lead. I would not be particularly worried about it, its more of a symptom than a cause of the poor performance with the current tuning. If you want to improve the gate waveforms shortening the gate lead would also help.

I think your correct as far as it being related to hard turn-ons. I noticed nasty gate signals and other wave forms when the coil is not tuned properly. Once I get it all dialed in everything looks sharp and clean.


Question: I plan on powering this via transformer and voltage double to give me ~90V DC. What order should I turn the coil on? Do you power the driver first or the MOSFET then power on the driver? I have always powered the bridge on first then the driver, havent seemed to have an issue. I just know with class E coils large voltage spikes are an issue and I wasnt sure if a particular order would be less stressful on the components.

Thank you,
Zak

Offline Weston

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Re: Class E SSTC Topology
« Reply #5 on: April 02, 2020, 10:44:04 PM »
In a classical Class-E with a feed choke a lot of energy is stored in the choke and that all gets dumped into the transistor if gate drive is suddenly turned off, so turn off sequencing is a concern. But this design does not have a choke like that.

For turn on, the main thing to be concerned about would be the MOSFET not receiving full gate drive voltage as the logic power supply ramps up, so ideally the driver would be powered up first. However, I  bet that the logic power supply ramps up fast enough where it is not an issue worth worrying about.


Offline ZakW

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Re: Class E SSTC Topology
« Reply #6 on: April 02, 2020, 11:02:29 PM »
Awesome, that all makes sense, thank you Weston.

I am going to spend some more time today trying to tune it, hopefully I can get it working properly again.

Offline ZakW

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Re: Class E SSTC Topology
« Reply #7 on: April 03, 2020, 07:26:37 AM »
Sorry for the double post. I wanted to update the thread with some pictures of the coil and components. Tuning was successful. I forgot to grab a picture of the scope and how its tuned.





Specs: 57nf tank capacitance, 1turn primary, tuning coil, running at 100v.

I used a ferrite rod from an fm/am radio to test if I needed more or less inductance. Turing the interrupter to a fast enough speed allowed the scope to trigger at the right time. I was then able to watch in real time the impact inserting the ferrite rod into the coil had. I was able to tell if I needed more or less inductance.

MOSFET gets a little warm now, although it is a very tiny heat sink. I have a small fan I initially planned on using that i might set up.

Here are some pictures of the base and coil, as well as some arcs from it.


General layout, tank caps, primary, and tuning coil:








EDIT:

Attached is my schematic. How does it look? I didn't have time to draw it in a proper program.





Using Mads page http://kaizerpowerelectronics.dk/tesla-coils/sstc-design-guide/ I calculated my Primary peak current, maths below.

Coil Res Frequency(base on scope signal) - 460kHz
Primary inductance (LCR meter) - 2.2uH

Primary Reactance = 2 π×460000×2.2×10^-6
= 6.36ohms

Peak Current = 100v/6.36ohms
= 15.73Apeak current

Thanks Mads!
« Last Edit: April 07, 2020, 05:14:22 AM by ZakW »

Offline Weston

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Re: Class E SSTC Topology
« Reply #8 on: April 05, 2020, 06:23:18 AM »
Great to see you have it working well! Schematic looks reasonable.

Calculating the primary current is going to be a bit more complicated than what is shown on that page because the voltage across the primary is not a sine / square wave but that weird half sine pulse. Additionally, you have the loading from the secondary impacting things and the extra inductance you added in series with the primary. It should be the same order of magnitude though.

If you fabricate a second current transformer and load it with the right burden resistance you should be able to measure the primary current on the scope.

Offline ZakW

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Re: Class E SSTC Topology
« Reply #9 on: April 06, 2020, 02:26:28 AM »
Great to see you have it working well! Schematic looks reasonable.

Calculating the primary current is going to be a bit more complicated than what is shown on that page because the voltage across the primary is not a sine / square wave but that weird half sine pulse. Additionally, you have the loading from the secondary impacting things and the extra inductance you added in series with the primary. It should be the same order of magnitude though.

If you fabricate a second current transformer and load it with the right burden resistance you should be able to measure the primary current on the scope.

Thank you, I am happy with how it performs!

As far as measuring current with a DIY CT/clamp, I dont know how to do that exactly. I am not sure how to figure out the number of secondary wingdings vs what the output will be and how to interpret the amount of current I am measuring. Do you have any advice on its construction or a place I can learn more about them? I am currently reading some site I found on making a homemade CT for measuring with a scope.

Thank you.

Offline ZakW

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Re: Class E SSTC Topology
« Reply #10 on: April 07, 2020, 05:07:31 AM »
I decided to just give it a shot and see what kind on results I got.

Here are some pictures of the CT I wound: 200:1





Here it is clamped on the primary:



Here is the shot from the scope CT (purple) Drain (yellow):



Here is shot of the Gate (purple) and Drain (yellow):




Results:

Wound 200:1 32awg magnet wire, used a 100ohm burden resistor.

I got 32v on the secondary of the CT. The formula I found for this type of calculation was Vout=(ILoad/N)*Rburden.

N-turns ratio
I Load - primary load current

32v = (ILoad/200)*100ohm
.32=ILoad/200
64=ILoad

64Amps does not sound right, I think I did something wrong here. Does anyone have any advice on how I can measure more accurately or if I am using the wrong calculations?

Update question:

Base on the above photo of the CT signal, is the current and voltage overlapping? Doesnt that cause a lot of heating? If its something I need to fix how would I go about phasing the current and voltage?

Here is what I mean:



thank you,
Zak
« Last Edit: April 07, 2020, 07:47:28 AM by ZakW »

Offline Weston

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Re: Class E SSTC Topology
« Reply #11 on: April 07, 2020, 08:15:43 PM »
Your calculations appear correct. Are you sure the scope probe attenuation setting matches the setting for the scope channel (the scope probe is on 10x and the scope channel is on 1x?). It looks like you could be off by a factor of 10. 6.4A peak current sounds reasonable. Other than that, check if you burden resistor is the correct value.

The primary has a DC current flowing through it which can cause the current transformer to saturate and not display accurate waveforms, but this looks reasonable. The voltage and current overlap on the scope because of the current flowing into the drain-source capacitor. If you could probe just the current going into the switch without the drain-source capacitance you would see little to no overlap.

As a side note, are you triggering the scope early into the interrupter pulse? It looks like the peak drain-source voltage is going up  across that waveform.

Offline ZakW

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Re: Class E SSTC Topology
« Reply #12 on: April 07, 2020, 08:48:01 PM »
Your calculations appear correct. Are you sure the scope probe attenuation setting matches the setting for the scope channel (the scope probe is on 10x and the scope channel is on 1x?). It looks like you could be off by a factor of 10. 6.4A peak current sounds reasonable. Other than that, check if you burden resistor is the correct value.

The 100x probe is my high voltage probe that is measuring the primary Drain voltage. The purple is set to 10x. Though I can double check this later.

As for the burden resistor I thought the same thing. I went and checked the value already. It read at 98ohms.

The primary has a DC current flowing through it which can cause the current transformer to saturate and not display accurate waveforms, but this looks reasonable. The voltage and current overlap on the scope because of the current flowing into the drain-source capacitor. If you could probe just the current going into the switch without the drain-source capacitance you would see little to no overlap.

That makes sense, thank you.

As a side note, are you triggering the scope early into the interrupter pulse? It looks like the peak drain-source voltage is going up  across that waveform.

I dont think I am, I notice that too and was not sure why that was happening. I am not very experienced when it comes to proper probing locations and techniques, let alone how to use the scope accurately.

Here are some more scope shots that might help:



« Last Edit: April 07, 2020, 08:50:03 PM by ZakW »

Offline johnf

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Re: Class E SSTC Topology
« Reply #13 on: April 07, 2020, 09:04:34 PM »
You have to be a little careful with burden resistor choice as this reflects by the turns ratio squared to the other side to add series impedance to your one turn. Not so important here, but very important when using low rds on mosfets especially if measuring source current waveform. I know that 100 ohms was a nice easy calculatable value but 10 ohms or 1 ohm probably would have been better.

Offline ZakW

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Re: Class E SSTC Topology
« Reply #14 on: April 07, 2020, 09:22:16 PM »
You have to be a little careful with burden resistor choice as this reflects by the turns ratio squared to the other side to add series impedance to your one turn. Not so important here, but very important when using low rds on mosfets especially if measuring source current waveform. I know that 100 ohms was a nice easy calculatable value but 10 ohms or 1 ohm probably would have been better.

Hello John,

Thanks for the input. I wish I could say I chose 100ohms for the ease of calculations. I chose it as a starting point to see what would happen ;D Im glad nothing blew up.

I can lower the resistor value later today and test again.

Offline ZakW

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Re: Class E SSTC Topology
« Reply #15 on: April 09, 2020, 04:17:27 AM »
Hello,

So I replaced the 100ohm resistor with a 1ohm resistor, below are the scope shots: Purple=CT voltage  Yellow=Drain voltage



Here is a shot of the coil running with a very high on time (like CW mode), the current seems even lower:  Purple=CT voltage  Yellow=Drain voltage



Is the core material saturating? and thats why its showing a flat peak? You would expect a much higher voltage in the CT due to higher peak current during the CW pulses.

Why does my previous post scope shot have the Drain voltage tapering off over time?

The calculations are way off using these number form the tests I did with the 1ohm resistor. I can say however, the current draw must be significant because during high on time pulses the lights dim a bit in between pulses.

Thank you,
Zak

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Re: Class E SSTC Topology
« Reply #16 on: April 09, 2020, 06:38:45 AM »
These last two current plots look like inverted and scaled-down versions of the drain voltage.  I'd say it's capacitive coupling (and an open connection somewhere) except for the inversion.  I'm still guessing there's some issue with an open connection in the latest current sensing.

Your earlier current traces with 100-ohm burden resistor look roughly correct.  Looks like 100App, which is appropriate for your drain voltage waveform and 57nF capacitor.  (The 2.2uH inductance you measured is likely higher than reality - perhaps LRC meter lead length.  I'm presuming 57nF is more accurate.  The frequency to use in primary current calculations is the half-cycle while the FET is off, not the repeat frequency.  Measure the width while the drain is above the supply voltage (above 100V before droop).  That's a half-cycle.  Looks like ~600kHz.)

The voltage sag you show in the final plot of reply 12 appears to be due to draining your 1500uF bulk caps.  You can easily see that the drain voltage ends at a DC level much lower than where it starts.  Other such variations are likely similar, either during charging of the bulk caps or between line voltage peaks when they are discharging.  May also be some low-frequency ringing with the line transformer leakage inductance and the bulk caps.
David Knierim

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Re: Class E SSTC Topology
« Reply #16 on: April 09, 2020, 06:38:45 AM »

 


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