SG3525A Plasma Speaker - Project

[ZakW]

Hello All,

Taking a brief pause on my DRSSTC design I decided to throw together an old circuit I made a long time ago. This time I wanted to make adjustments and see how well I could get it to work.

The source for this build can be found here - https://civilpedia.org/p/?t=Plasma-Speaker-II&pid=108. A guide I followed about 12 years ago.

Here is the schematic: I did read on 4hv that someone else created this design awhile ago and the link above adopted it. Either way, thank you.



Here is my schematic DRAFT:



Operates around 90-100kHz

Some changes I have made so far:

• Removed the bootstrap configuration and added a UCC27425 gate driver IC
• Removed the unnecessarily huge split rail electrolytic caps and replaced them with 1uF MKP type
• Added a 1uF cap across the bridge input to reduce switching spikes
• The GDT (T35) is 1:1.44. 9 Primary and 13 secondary to give a slight bump to the voltage.

Changes I plan on making:

• The 1uf caps (C23/24) get really hot at 60v likely due to their impedance of ~1.5ohms at 100kHz. I plan on increasing that value to around 5uF to reduce that.
• I want to replace the antiparallel zenners with TVS diodes
• I might need to add spacers to the homemade flyback core to reduce saturation
• Soon I will test out a small Bluetooth receiver module instead of using a 3.5mm cable

Here are a couple videos using a salvaged flyback as well as my custom wound flyback.

This is the DIY flyback secondary

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DIY Flyback:

I have always wanted to wind and pot a homemade flyback secondary. Finally I gave it a try. I printed a small bobbin using PLA and wound it with 36awg. I used a small core I had just as a test.

Not sure on the turn count. I haven't tried to calculate it at this point. The first one I created was a test and eventually arced over at a weak spot seen here



I designed a new bobbin that had more spacing as well as a small gap to allow for a single turn around the bobbin before starting the new coil from the BOTTOM, reducing the HV stress of the winding starting at the top from the previous coil.











I degassed the thinned epoxy in my makeshift vacuum chamber the best I could. I then filled the form with epoxy pulling a vacuum repeatedly to get as much air out as I could. Topped it off and let it cure. So far it seems to be holding up great!

at 30v I get about 4.5in arcs from it. A lot lower voltage of course but at higher currents. I plan on winding a new one with 41awg wire to get more voltage.


General:

-  So far the audio seems AMAZING, my phone mic doesn't do it justice. I hope the bluetooth module doesn't impact the sound quality too much.

-  MOSFETs stay surprisingly cool now, at 60v they can get a bit warm. When I built the original version you could have cooked and egg on the heatsink.

-  I am working on a PCB design right now. Ideally, I could have two running at the same time off of one Bluetooth module (L & R Channel) for stereo output. That would require two drivers as well as two matching flybacks. Could be fun.

-  I will post updates as I get farther along in the project.

-  Any feedback or advice is much appreciated!


Thank you!

[davekni]

Great demonstration!  I've seen TC arcs (open-ended) as plasma speakers.  Haven't seen point-to-point arcs as speakers.  Yours sounds good even with whatever microphone limitations.  (I've had trouble with electret microphones, which most small embedded microphones are, with capacitive coupling from TC high-voltage fields.)

I plan on winding a new one with 41awg wire to get more voltage.

That will be an interesting comparison.  I could speculate that the longer thinner arc (higher voltage lower current) may be less stable so produce lower quality audio, at least if stretched close to its maximum length.  If arc length is constant, then the lower current may make for lower audio volume.  Perhaps reduced audio volume only lower audio frequencies.  Looking forward to seeing reality even if judging is somewhat subjective.

[ZakW]

Great demonstration!  I've seen TC arcs (open-ended) as plasma speakers.  Haven't seen point-to-point arcs as speakers.  Yours sounds good even with whatever microphone limitations.  (I've had trouble with electret microphones, which most small embedded microphones are, with capacitive coupling from TC high-voltage fields.)

Thanks, Dave! I haven't notice any interference from recording with my phone. Sometimes my SSTC would cause the video to start and stop but never any audio issues.

That will be an interesting comparison.  I could speculate that the longer thinner arc (higher voltage lower current) may be less stable so produce lower quality audio, at least if stretched close to its maximum length.  If arc length is constant, then the lower current may make for lower audio volume.  Perhaps reduced audio volume only lower audio frequencies.

I wound the new bobbin and potted it the other day. Fairly certain there is as much wire in a single segment using the 41awg than there is in the whole bobbin using 36awg. Each section took about 5min straight at the highest drill RPM. I expect much higher voltage.

When adjusting the frequency on the driver, the arc will grow thicker/thinner depending on how close I am to resonance (I am assuming). I notice trade offs for sure. It seems to sound the best (fuller richer sound) just before the arc is the thickest (highest current draw) and it is drawn out the longest. I will try and document this better.

Looking forward to seeing reality even if judging is somewhat subjective.

I am as well! Your feedback is appreciated. I will try and post a video comparing different configurations.


Questions:

A few questions for you regarding the bridge.

A while back I built a half bridge using your copper tape method, pretty much exactly as I did it before. My smaller (15mm lead spacing) WIMA 250v 1uf DC link caps were almost melting after ~30sec of run time @ 60V. The copper tape also got so hot that the bridge physically started to bend because the plastic sheet I adhered the tape too was softening from the heat. I also noticed the IRFP260s heating up a lot more than before.

I replaced the small caps with ~650vDC 1uf  WIMA caps, physically much larger (27.5mm lead spacing) and did not notice them heating anymore. However, the bridge tape and MOSFETs still heated a lot. Shortly after testing the new caps the high side MOSFET died. I am going to rebuild the bridge and order some IRFP250s. They have half the gate charge and Rds On as the 260's.

Was something else happening that was resulting in the bridge physically heating so much?? Obviously, it was related to the current at the time but it wasn't heating like that before. Something must have changed or been impacted by the small WIMA caps getting really hot. If the currents really are that high, I doubt a traditional PCB will be able to handle those currents. 


More pictures and videos to come once I rebuild the bridge.

[davekni]

Several possible causes for bridge heating.  One possibility is high frequency oscillation at each switching edge.  I've had that occur before on bridges using FETs.  Inter-winding capacitance of GDT combined with fast Vds voltage swing causes enough spike to switch FET back the other direction, with switching repeating at high frequency.  Never had that issue with IGBTs because of the switching delay between Vge and Vce.

GDTs that are not 1:1 ratio have much higher leakage inductance.  That may contribute to oscillation as above, or make slow switching which increases power dissipation.  I'd suggest matching driver voltage to gate voltage and using a 1:1 GDT with twisted pairs for each winding as in:
    https://highvoltageforum.net/index.php?topic=1854.msg13949#msg13949
If oscillation is the issue, adding common-mode choke(s) can help, especially one on high-side GDT output leads.  Wind common mode choke with twisted lead from GDT secondary.

FET switching may be at high current point in waveform rather than near zero current.  Small caps may have been resonating with transformer primary inductance.  Perhaps resonance was making switching point close to zero current.  Probably can't be completely avoided with pulse width modulation for audio.  Perhaps matching HV transformer secondary self-resonant frequency could help.  Best to have FETs turn off while conducting current.  Turning off while parallel diode is conducting makes opposite FET conduct diode reverse recovery current as well as drain capacitive charge of both FETs.

And, of course, could be just high current and IR drop.  Unlikely, however, presuming heat sink is not getting as hot as H-bridge board.

Scoping will help determine what issue you are seeing.

BTW, your secondary self resonant frequency will be much lower with this new winding.  May require significant change in input frequency match well.

Hope heat reduction effort goes well.

[ZakW]

Hello Dave, thanks for the ideas. Gives me something to think about through out the day 

Several possible causes for bridge heating.  One possibility is high frequency oscillation at each switching edge.  I've had that occur before on bridges using FETs.  Inter-winding capacitance of GDT combined with fast Vds voltage swing causes enough spike to switch FET back the other direction, with switching repeating at high frequency.  Never had that issue with IGBTs because of the switching delay between Vge and Vce.

I scoped the GDT output in the beginning and I thought the wave form looked decent, A little over dampened and had a slight sag at the bottom. Once I lowered the gate resistance from 12ohm to 10ohm it looked perfect. I did not see any ringing at the time. That was before things started getting really hot though so something may have changed.

I will investigate this once I have the bridge rebuilt.

GDTs that are not 1:1 ratio have much higher leakage inductance.  That may contribute to oscillation as above, or make slow switching which increases power dissipation.  I'd suggest matching driver voltage to gate voltage and using a 1:1 GDT with twisted pairs for each winding as in:
    https://highvoltageforum.net/index.php?topic=1854.msg13949#msg13949
If oscillation is the issue, adding common-mode choke(s) can help, especially one on high-side GDT output leads.  Wind common mode choke with twisted lead from GDT secondary.

The only way I wind GDTs now is like how you have it documented, no worries there.

When powering the UCC27425 at 15v I was only getting ~8.6v on the output of a 1:1 GDT... The wave form didn't look bad just was at a lower voltage. I was not sure what was causing such a drop in output. I was using a 2.7uF DC blocking cap on the GDT primary, would more capacitance increase the voltage? I added a couple extra primary turns and that fixed the issue with what looked like minimal impact to the GDT signal output. I will be sure to share pictures of this soon.

The chokes are something else I will keep in mind.

FET switching may be at high current point in waveform rather than near zero current.  Probably can't be completely avoided with pulse width modulation for audio.  Perhaps matching HV transformer self-resonant frequency could help.  Best to have FETs turn off while conducting current.  Turning off while parallel diode is conducting makes opposite FET conduct diode reverse recovery current as well as drain capacitive charge of both FETs.

When I am adjusting the frequency and the arc gets really thick I assume that is at or close to resonance, right? Current draw goes from ~3-5A up to 7-8A. I figured the increased current draw was resulting in more heating so I was running the transformer a bit aways from the resonant fres. I wonder if that lead to less than ideal switching like you mentioned.

BTW, your secondary self resonant frequency will be much lower with this new winding.  May require significant change in input frequency match well.

I will need to check with my scope to confirm this but as I lower the fres via the potentiometer I see the PWM signal from the SG3525A increase (more on than off). Does that mean the UCC is no longer outputting a 50% duty cycle signal and the FETs are on longer than they are off? Hopefully I did not mess that up too much.

Hope heat reduction effort goes well.

Thank you, this gives several ideas to look into. I will post more updates soon!

[davekni]

When powering the UCC27425 at 15v I was only getting ~8.6v on the output of a 1:1 GDT... The wave form didn't look bad just was at a lower voltage. I was not sure what was causing such a drop in output. I was using a 2.7uF DC blocking cap on the GDT primary, would more capacitance increase the voltage? I added a couple extra primary turns and that fixed the issue with what looked like minimal impact to the GDT signal output. I will be sure to share pictures of this soon.

Something is quite wrong if getting 8.6V from 1:1 GDT.  What did GDT input look like?  Was it also close to 8.6V?  Perhaps GDT is saturating or the wrong core type.  I'd fix that issue rather than changing GDT ratio.  BTW, 12V should be plenty for FET gates.  You could reduce voltage a bit to avoid overheating UCC27425 chips with 1:1 GDT.

Haven't studied the circuit much yet.  Is audio modulating duty cycle?  Presuming so, that may be causing issues with GDT use.  GDT designs usually are built around an assumption of 50% duty cycle.  Straying too far from 50% will cause mismatched Vgs high and low voltages.  If higher voltage hits gate protection TVS diode conduction, may cause GDT core saturation (net DC current draw).

Current draw may indicate hitting series resonance of transformer leakage inductance with H-bridge caps.  Hard to say just what is happening without knowing transformer characteristics.

[ZakW]

Something is quite wrong if getting 8.6V from 1:1 GDT.  What did GDT input look like?  Was it also close to 8.6V?  Perhaps GDT is saturating or the wrong core type.  I'd fix that issue rather than changing GDT ratio.  BTW, 12V should be plenty for FET gates.  You could reduce voltage a bit to avoid overheating UCC27425 chips with 1:1 GDT.

Figured out the issue - there was a loose connection to the UCC input b. Since I constructed it on a breadboard there were bound to be connection issues.

Input B was not being driven so there was only one output, hence the lower output voltage. Tied both inputs together and fed a single output from the SG3525A to the UCC. That resulted in a GDT output of around 10-12v depending on the frequency.

I corrected the error in my schematic and updated it here:



Here is the 1:1 output of the GDT:
- Purple = Q2 Vgs
- Blue = differential probe across the primary

Might need to lower the 10ohm gate resistors for less dampening.



Here is the new temporary protoboard layout as I continue to work on the PCB and test new components:

I also added a bluetooth module (small board on the right) and am testing a 2.2kohm input resistor to reduce noise by better matching the impedance of the audio input. So far it sounds great with the bluetooth.



You can also see the new bridge layout and custom transformer:

Haven't studied the circuit much yet.  Is audio modulating duty cycle?  Presuming so, that may be causing issues with GDT use.  GDT designs usually are built around an assumption of 50% duty cycle.  Straying too far from 50% will cause mismatched Vgs high and low voltages.

Depending on the pwm frequency the duty cycle varies from around ~46%-55%. Will that be an issue?


Heating:

- Previous issues seem to have gone away since creating the new protoboard layout and rebuilding the bridge. The larger size caps dont see to heat up hardly if at all. Heatsink gets warm but after a minute or so of continuous use. The copper tape does get warm but not nearly how hot it was before.

FET switching may be at high current point in waveform rather than near zero current.  Small caps may have been resonating with transformer primary inductance.  Perhaps resonance was making switching point close to zero current.  Probably can't be completely avoided with pulse width modulation for audio.  Perhaps matching HV transformer secondary self-resonant frequency could help.  Best to have FETs turn off while conducting current.  Turning off while parallel diode is conducting makes opposite FET conduct diode reverse recovery current as well as drain capacitive charge of both FETs.

The scope shot above looks like the FETs are turning off while current is still flowing, is that correct? The waveform gets more sinusoidal when I get around 44kHz. I assume that because I am getting closer to resonance for the xfmr? If I understand what you said correctly, I want the output to be more in phase with the gate drive signal?

General:

- tried the new transformer last night but Q2 ended up dying, all pins shorted. I think there was a loose connection on the driver during operation but I was also not scoping anything at the time so I don't know if the new xfrm killed it or if it was the breadboard.

[davekni]

Depending on the pwm frequency the duty cycle varies from around ~46%-55%. Will that be an issue?

That shouldn't be problematic.  Looked up SG3525A now.  In this circuit it is being used only as a variable frequency oscillator, so no intentional duty cycle changes.  SG3525A is capable of more, but that is not being used here.

Previous issues seem to have gone away since creating the new protoboard layout and rebuilding the bridge. The larger size caps dont see to heat up hardly if at all. Heatsink gets warm but after a minute or so of continuous use. The copper tape does get warm but not nearly how hot it was before.

From scope capture, it is clear that caps C23 and C24 are resonating with transformer inductance, not large enough to be just DC blocking.  This series-resonant circuit can draw widely varying current depending on how close frequency is to a resonant.  Perhaps that is the intention, to allow audio modulation of frequency to control arc current.  Also, unless C25 is large, there could be an additional resonant frequency between C25 and wiring back to power supply.  Even if that is not an issue now, I'd suggest adding a bulk cap (electrolytic or large film) across C25, something much larger value than C23 and C24.  That way there is no possibility of supply lead wiring changes making unexpected circuit behavior changes.

The scope shot above looks like the FETs are turning off while current is still flowing, is that correct?

Looks like the opposite to me.  Current is proportional to derivative of voltage across caps C23+C24.  Voltage slope has reversed before bridge output switching, so current has crossed zero before switching.

The waveform gets more sinusoidal when I get around 44kHz. I assume that because I am getting closer to resonance for the xfmr? If I understand what you said correctly, I want the output to be more in phase with the gate drive signal?

Running slightly above resonant frequency will cause half-bridge voltage to switch slightly before current zero-crossing.  That will reduce FET heating and stress.

tried the new transformer last night but Q2 ended up dying, all pins shorted. I think there was a loose connection on the driver during operation but I was also not scoping anything at the time so I don't know if the new xfrm killed it or if it was the breadboard.

Yes, could easily be a loose connection.  Or hit a resonant frequency close enough that current got too high, especially if just below resonant frequency rather than just above.

Good luck with updates.

[ZakW]

From scope capture, it is clear that caps C23 and C24 are resonating with transformer inductance, not large enough to be just DC blocking.

I thought I was seeing some sort of resonance happening. I didn't know it was because of C23/24. I still have a lot to learn when correlating what the scope is showing me vs what is causing it. When turned well below resonance the output looks like a square wave.

I have some 5uF caps in the mail to replace the 1uF I am currently using.

This series-resonant circuit can draw widely varying current depending on how close frequency is to a resonant.  Perhaps that is the intention, to allow audio modulation of frequency to control arc current.

You're correct, current draw goes WAY up at resonance. Can even trip the over current on my supply. Audio sounds the least flat or muffled just after or before resonance. I think the increased arc current at resonance makes the audio too loud and distorted.

Also, unless C25 is large, there could be an additional resonant frequency between C25 and wiring back to power supply.  Even if that is not an issue now, I'd suggest adding a bulk cap (electrolytic or large film) across C25, something much larger value than C23 and C24.  That way there is no possibility of supply lead wiring changes making unexpected circuit behavior changes.

Thanks for the heads up, I wasn't aware that the single 1uF cap could be an issue. I will add a larger electrolytic cap as well.


Question on number of turns:
Less turns = Increase output voltage (xfmr voltage to turns ratio) but increased magnetizing current (stress) for the inverter, right?
More turns = lower voltage, less stress on inverter but could lead to core saturation which is bad for the transformer and the inverter, right?

How might I tell if the core is saturating, is that detectable with the scope?

Do I want a gap in the core or is that only for flyback mode? If I understand correctly, I am not driving the transformer in flyback mode.

Thanks, Dave!

[davekni]

Less turns = Increase output voltage (xfmr voltage to turns ratio) but increased magnetizing current (stress) for the inverter, right?

Yes.

More turns = lower voltage, less stress on inverter

Yes.

but could lead to core saturation which is bad for the transformer and the inverter, right?

No, opposite, at least for constant input voltage and frequency.  More turns means less volts/turn (for constant primary voltage), so less magnetic flux (for constant frequency), so farther from saturation.

How might I tell if the core is saturating, is that detectable with the scope?

When running close to resonant frequency, current (and therefore voltage across C23+C24) will become distorted.  Current will have spikes and cap voltage will have steep sections.
If not resonant (large C23 and C24), current will still have spikes, but those will be harder to see.  Examine FET Vds just before switching points for a larger increase, or voltage across C23 or C24.

Do I want a gap in the core or is that only for flyback mode? If I understand correctly, I am not driving the transformer in flyback mode.

Correct, you are not in flyback mode.  However, gap is useful if aiming for lower pole resonant frequency.  If avoiding resonance or running at upper pole frequency (at transformer leakage inductance resonance with C23+C24), gap is not needed.

Audio sounds the least flat or muffled just after or before resonance. I think the increased arc current at resonance makes the audio too loud and distorted.

Don't think it is directly related to high arc current.  Rather that audio modulation of frequency is changing frequency from one side of resonance to the other.  Arc gets weaker for both positive and negative audio voltages, causing huge distortion.  Even close to resonance has non-linear response of arc current to frequency.
However, if you operate far away from resonance, there may be little change in arc current with frequency, so little audio response.
If avoiding resonance, probably better to use SG3525A chip as intended.  Use both outputs and modulate duty cycle rather than frequency.  Actually OK to modulate duty cycle here, as duty cycle drops equally for both positive and negative parts of half-bridge drive.  Vgs will be 0 for a while every half-cycle.  Does require good low-inductance GDT construction so that Vgs transitions cleanly to 0V from either +10V or -10V.  SG3525A data sheet shows a half-bridge GDT-coupled design example.

[ZakW]

Made a video update!

Don't think it is directly related to high arc current.  Rather that audio modulation of frequency is changing frequency from one side of resonance to the other.  Arc gets weaker for both positive and negative audio voltages, causing huge distortion.  Even close to resonance has non-linear response of arc current to frequency.

That makes a lot more sense. Looking at the scope I can see how the frequency is changing therefore making the transformer go in and out of resonance producing a larger net change in arc current resulting in louder audio.

Can you look at the scope waveform at 7:06 in the video? When I decrease the frequency of the driver to much ~40-50kHz the scope output is all over the place. I ended up killing five IRFP250's and two 460s because I accidentally turned the pot too much only for a second. If I had to guess I would say it is even closer to resonance which is causing much higher voltages and currents to flow.

Around 90kHz the output looks like a square wave, when tuned lower around 70kHz it starts developing steeper slopes. Is that because I am approaching resonance?

The DC blocking caps and the cap across the DC supply do not seem to be heating excessively anymore which is great. The IGBTs I installed only get warm to the touch.

Making progress!

[davekni]

Video mentions a 5uF cap across supply, presumably underneath.  What type of cap (film, electrolytic)?

Can you look at the scope waveform at 7:06 in the video? When I decrease the frequency of the driver to much ~40-50kHz the scope output is all over the place.

Current is a bit higher, but not drastically.  It is clear that bridge output is switching when gate waveform isn't.  Where is gate waveform being measured (where is scope probe connected)?
IGBTs are specified for 15Vge.  Running at 10-12V is a likely cause for problems.  In a couple threads I've listed driver chip options capable of 20V and up.  Don't have time to look for those at the moment.  Higher drive voltage is much better than making GDT ratio higher.  Duty cycle is far enough away from 50% to be contributing some to reduced Vge.  One option is to run SG3525A at 2x frequency and use a FF (ie. HC74) to divide by two.  Then duty cycle will be accurately 50%.
Connection of GDT secondary could be an issue, though less likely.  Emitter connections should be on IGBT lead close to package.  GDT leads should route away from high current path (away from H-bridge board) to minimize magnetic pickup.  I could not see GDT lead dress well enough in video.

Was interesting studying video scope captures, single-frame at several locations just before and just after arc breaks.  Doesn't look like any strong resonances during most of it.  Low Q generally.  H-bridge current (derivative of cap voltage) looks close to a resistive load during some of the best arcs.  Using both SG3525A outputs as intended and modulating duty cycle with audio might give better results.

[ZakW]

Video mentions a 5uF cap across supply, presumably underneath.  What type of cap (film, electrolytic)?

I have two film caps in parallel across the supply. One 1uF (smaller grey) and one 5uF (blue). I tried adding a 160v 220uF electrolytic cap but it started to get pretty warm. Plus looking at the scope and adding the cap I could see the impact it had on the output in real time. The 5uF and the 220uF had the same impact on the waveform. Helped smooth out a few droops in the signal and that was it.

Current is a bit higher, but not drastically. Where is gate waveform being measured (where is scope probe connected)?

The purple trace was connected to Q2 Vge (after gate resistor and diode, close to IGBT package).

It is clear that bridge output is switching when gate waveform isn't.

Could this be caused by the power supply limiting the current? I am using a 60v 8A supply. When I lower the frequency and current goes up I have seen the digital voltage display start to drop (at max current?). If the supply is current limiting and causing spikes or pulses on the DC supply that sounds like it could cause failures on the bridge. Just speculating.

IGBTs are specified for 15Vge.  Running at 10-12V is a likely cause for problems.  In a couple threads I've listed driver chip options capable of 20V and up.

I knew lower Vge voltage would not be ideal but I had to try something, MOSFETs were dying left and right. I will look up some higher voltage chips and see what I can find.

Connection of GDT secondary could be an issue, though less likely.  Emitter connections should be on IGBT lead close to package.

Based on the close up photos I posted above I think my connections overall are short enough, I could move the emitter connection a bit lower though.

Using both SG3525A outputs as intended and modulating duty cycle with audio might give better results.

When I connected both outputs (A,B) to the UCC inputs (INA,INB) the UCC was no longer outputting a square wave. It look like the two output signals were causing destructive interference and I was only left with a small spike where the signals did not overlap. That is what I was seeing across the GDT at least. That is why I am only using a single output of the SG3525. Do you know what might have cause that behavior?

[davekni]

I have two film caps in parallel across the supply. One 1uF (smaller grey) and one 5uF (blue).

That's good.  I couldn't see the second in video.

I tried adding a 160v 220uF electrolytic cap but it started to get pretty warm.

Would have been even worse with a 5uF electrolytic.  That's why I asked.

Could this be caused by the power supply limiting the current?

Unlikely.  Bridge output voltage goes far above supply voltage.  Would require supply to misbehave in an extreme way.

I knew lower Vge voltage would not be ideal but I had to try something, MOSFETs were dying left and right. I will look up some higher voltage chips and see what I can find.

Here's the post I made about such.  Some are pin compatible with UCC2742x chips:
    https://highvoltageforum.net/index.php?topic=2400.msg17650#msg17650

Based on the close up photos I posted above I think my connections overall are short enough, I could move the emitter connection a bit lower though.

Looks good.

When I connected both outputs (A,B) to the UCC inputs (INA,INB) the UCC was no longer outputting a square wave. It look like the two output signals were causing destructive interference and I was only left with a small spike where the signals did not overlap. That is what I was seeing across the GDT at least. That is why I am only using a single output of the SG3525. Do you know what might have cause that behavior?

UCC27425 has one inverting channel and one non-inverting channel.  You need to use a driver chip such as UCC27424 with both channels non-inverting in order to keep gate signals matching what SG3525A is generating.

From your first post:

Removed the bootstrap configuration and added a UCC27425 gate driver IC

The initial schematic is not boot-strapped.  Those diodes are to protect SG3525A from reverse current due to GDT inductance.  Many gate driver chips including UCC2742x are not intended for reverse output current (not intended to drive GDTs).  Many TC drivers add diodes to supply and ground on UCC chip outputs for this reason.  Would be a good idea for your circuit too, even though probably not related to this specific issue.  Schottky diodes are best, such as 1N5818.

If you do change to use both SG3525A outputs, I'd recommend modulating pin 2 with audio rather than frequency.  Remove C8 and C9.  Bias pin 2 between Vref (pin 16) and ground to set center (no audio) duty cycle.

[ZakW]

Here's the post I made about such.  Some are pin compatible with UCC2742x chips.

I don't see the link but I did find the IRS4427PBF https://www.mouser.com/ProductDetail/Infineon-Technologies/IRS4427PBF?qs=9%252BKlkBgLFf2tsNbg0Dse2w%3D%3D as a DIP-8 replacement for testing. I will switch over to SMD later so matching the pinout of the 27425 is not necessary later on.

You need to use a driver chip such as UCC27424 with both channels non-inverting

Out of curiosity would a dual inverting work as well? I understand a inverting/non-inverting output wont work in this application.

The initial schematic is not boot-strapped.

Thank you for clarifying that. My mistake.

If you do change to use both SG3525A outputs, I'd recommend modulating pin 2 with audio rather than frequency.  Remove C8 and C9.  Bias pin 2 between Vref (pin 16) and ground to set center (no audio) duty cycle.

I will give this a shot. I am going to update my schematic with what I think I need to do, would you mind proofing it to make sure I implemented your advice correctly?

EDIT:
I found this site that discusses the SG3525A as a flyback driverhttps://markobakula.wordpress.com/about/half-bridge-flyback-driver/ that has this schematic:


They said "I’ve also added an audio input which is AC coupled to duty cycle control, allowing for singing arc experiments. While it works, the audio quality is not very great, apparently because the SMPS control chip wasn’t designed with high PWM linearity in mind."

In the schematic I understand the pot connected to pin 2 is forming a voltage divider to set the duty cycle and the audio is added via the 1uF cap. I am not sure what JP1 is by R5 (pin 2), is the voltage divider disconnected when modulating with audio?

Finally, do you know what the pot connected to pins 1&9 is for? I assume the pot connected to pin 6 adjusts the frequency like it does in my circuit.

Do you think the audio qualty will be reduced by modulating the duty cycle instead of the PWM frequency like I am doing now?

[NyaaX_X]

You need to use a driver chip such as UCC27424 with both channels non-inverting

Out of curiosity would a dual inverting work as well? I understand a inverting/non-inverting output wont work in this application.

So.. the SG3525 output A & B are inverting and non inverting signal in this circuit and the ucc27424 dual non inverting acts a buffer and provide a stronger driver ability to drive the gdt ? If using ucc27525 that you may only get the pulse of dead-time ? Is that making sense ? I guess.

[ZakW]

So.. the SG3525 output A & B are inverting and non inverting signal in this circuit and the ucc27424 dual non inverting acts a buffer and provide a stronger driver ability to drive the gdt ? If using ucc27525 that you may only get the pulse of dead-time ? Is that making sense ? I guess.

That's my understanding at least. My question was about if dual inverting or dual non-inverting ICs are interchangeable.

[NyaaX_X]

If dual inverting or dual non-inverting ICs are interchangeable.

I think if the 3525 complement signal has some dead-time, if you apply a inverting buffer that will make the driver signal has high-level overlapping. But there'll be a dc-block capacitor in the gdt primary.. so I guess it will works like non-inverting buffer.

But I think I read someone said that it's better to use the gdt for a 50% duty cycle waveform to decrease DC magnetic biasing.

[davekni]

I don't see the link but I did find the IRS4427PBF https://www.mouser.com/ProductDetail/Infineon-Technologies/IRS4427PBF?qs=9%252BKlkBgLFf2tsNbg0Dse2w%3D%3D as a DIP-8 replacement for testing. I will switch over to SMD later so matching the pinout of the 27425 is not necessary later on.

That chip looks fine. A bit on the slow side, but probably OK since you are not running high frequency.
I've edited my last response to include the missing link.

Out of curiosity would a dual inverting work as well? I understand a inverting/non-inverting output wont work in this application.

Yes, since you are driving a GDT, should be fine.  If directly driving gates, inversion would not work.

I found this site that discusses the SG3525A as a flyback driverhttps://markobakula.wordpress.com/about/half-bridge-flyback-driver/ that has this schematic:

I'll need to study this circuit a bit.  May be good or at least closer to workable.  Hopefully I'll remember to reply again in a few days with an update on this circuit.

But I think I read someone said that it's better to use the gdt for a 50% duty cycle waveform to decrease DC magnetic biasing.

If there is no zero time between positive and negative gate drive, then 50% duty cycle is needed.  With zero time between positive and negative as when both SG3525A outputs are used, what matters is that positive pulse width matches negative pulse width.  That keeps average voltage across GDT zero.

They said "I’ve also added an audio input which is AC coupled to duty cycle control, allowing for singing arc experiments. While it works, the audio quality is not very great, apparently because the SMPS control chip wasn’t designed with high PWM linearity in mind."

SG3525A should have a reasonably linear response to error input voltage to duty cycle.  My guess the arc energy wasn't close enough to linear with duty cycle.  I'd guess it to be at least as good as one would get by modulating frequency with audio.

In the schematic I understand the pot connected to pin 2 is forming a voltage divider to set the duty cycle and the audio is added via the 1uF cap. I am not sure what JP1 is by R5 (pin 2), is the voltage divider disconnected when modulating with audio?

I have no idea about JP1 either.  POT to pin 2 is setting center duty cycle.  Audio modulates on either side of that center.  Perhaps set center to 30% or 35% so modulation can go from 10% to 48% or whatever max is.  Arc probably gets non-linear at too low duty cycle.

Finally, do you know what the pot connected to pins 1&9 is for?

That is setting audio gain.  I'd suggest setting to low gain and making incoming audio amplitude large enough.  That minimizes sensitivity to local noise on this board.

I assume the pot connected to pin 6 adjusts the frequency like it does in my circuit.

Yes.  Of course set C3 value to make your desired frequency somewhere towards center range of POT.

Do you think the audio qualty will be reduced by modulating the duty cycle instead of the PWM frequency like I am doing now?

I'd guess it could be better.  However I have little experience with how linear arc power relates to either frequency nor duty cycle.  Just my intuition says response to duty cycle might be more linear.

This circuit should work fine with a driver chip instead of the discrete transistor buffer.  I would include the diodes D5-D8 on output of driver, but change them to schottky such as 1N5818.

Circuitry into pin 10 looks like over-current shutdown.  Optional depending on how much risk you want to take on your half-bridge parts.

[ZakW]

Thanks, Dave! I appreciate you taking the time to review the schematic and provide some more context.

I am going to give it a try. I will order some higher voltage gate driver ICs to test out (thanks for the link to your post). While I am at it I will make a new protoboard so I can compare the two setups.

Circuitry into pin 10 looks like over-current shutdown.  Optional depending on how much risk you want to take on your half-bridge parts.

For testing I think I will leave it out.

It will be interesting to take some measurements and see how each design compares in regards to operation and sound quality.


New transformer wound with 34 awg on the largest core I have. Tested it a bit earlier and got great results so far.