Single switch inverter push CRT transformer

[NyaaX_X]

Hello ,

I try to build this circuit to make some arcs , but there I have a spike when IGBT turned off , there're also the same issue when I apply a IRFP260N MOSFET to replace the IGBT . And because I use a IGBT that don't have internal reverse diode so I add two MUR460 parallel outside between CE . The oscillate frequency is about 35kHz square wave and the duty of it is under 50% or just 50% . I am here to get some help ~~~

[davekni]

Vce turn-off spike is likely from parasitic wiring inductance between IGBT and capacitors (C1 in schematic).  Even though your connection looks reasonably short, it doesn't take much inductance to make such spikes.  This isn't exactly for this design, but my tutorial on half-bridge layout might be helpful:
    https://highvoltageforum.net/index.php?topic=1324.msg9795#msg9795
Or you can ignore the spike and keep running.  Doesn't look long enough to waste too much power and not high enough to exceed IGBT Vce maximum limit.  Might interfere with local radio reception if that is of concern to you.

[NyaaX_X]

OK~ I was thinking that whether the reverse diodes can absorb the inductive voltage ... It seems not . But the MOSFET or IGBT are getting hot in this circuit so I have to use a 12V fan to blow away the warming.

[davekni]

OK~ I was thinking that whether the reverse diodes can absorb the inductive voltage ... It seems not

The reverse diode (and internal FET body diode) conduct after Vds returns to 0V (actually slightly below 0V due to diode forward drop).  The spike is positive voltage when diodes are reverse-biased.  No conduction for reverse-biased diodes unless voltage exceeds diode's avalanche breakdown voltage.

[NyaaX_X]

OK~ I was thinking that whether the reverse diodes can absorb the inductive voltage ... It seems not

The reverse diode (and internal FET body diode) conduct after Vds returns to 0V (actually slightly below 0V due to diode forward drop).  The spike is positive voltage when diodes are reverse-biased.  No conduction for reverse-biased diodes unless voltage exceeds diode's avalanche breakdown voltage.

Oh .. I forget that .. You are right Dave , Thank you . So that pre-board tin-wiring is too long from transistor to the transformer primary . But what about those capacitor ? Don't they make voltage rises smoothly ? Or maybe that <1cm wiring parasitic wiring inductance from Cap to transistor as you pointed in my LTspice schematic can create that ~50V spike.

[davekni]

So that pre-board tin-wiring is too long from transistor to the transformer primary . But what about those capacitor ? Don't they make voltage rises smoothly ? Or maybe that <1cm wiring parasitic wiring inductance from Cap to transistor as you pointed in my LTspice schematic can create that ~50V spike.

The FET leads themselves are over 1cm.  Then there is a screw block.  Sometimes those have some folded metal, so not the shortest path.  Then wiring to caps and cap lead inductance.  If you want to minimize spike, FET needs to be soldered to a two-layer board (copper foil or whatever), source to one side and drain to other side, as close to FET body as possible.  Caps can be either horizontal along edges of board or drill holes through board with small clearance on top side.  Bend one lead of each cap horizontal.  Insert other lead through hole and solder on back side.  Solder horizontal cap lead on top side close to cap.

[NyaaX_X]

OK I get it . Beside the spike what about the heating ? I think this circuit is similar to induction stove . Consider the FBT arc power , is that normal for this circuit that mosfet or igbt get warm? like 40~50 Celsius degree .