Author Topic: Unsuccessful attempt to within-pulse MMC tuning (reverse frequency chirp)  (Read 726 times)

Offline davekni

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Decided it was worth a post on a project I'm finally abandoning.  Haven't kept exact track, but I've spent well over 1000 hours intermittently over past 3 years.  Goal is to add MMC capacitance to primary as arc adds capacitance to secondary, making frequencies track.  Used 432 TRIACs across six boards.  Here's a spread-out image of the project.  The six boards were to be stacked for any actual use.



Four of the pure capacitor array boards aren't included.  Full MMC capacitance was to be six of these capacitor-only boards.  Smaller switched MMC sections are in series with each, keeping switching at a little lower voltage (reduced GDT insulation stress).

The pile of failed TRIACs is from the second board.  Had gotten the first one working after a similar number of failed parts.  I'd thought initial failures were a result of stress caused by my debug mistakes.  Didn't save those dead TRIACs.  After getting the first board working, built the other five.  Made one testing mistake on second board, frying the TRIACs shown.  Tested the third board without making any mistakes AFAIK.  Still had failures (not repaired).  What I've learned is that in this stress-case use, TRIACs tend to fail with A2 to gate breakdown.  This failure sends a large spike backwards through GDT and into other GDTs, triggering all the TRIACs at the wrong time (not at zero-crossing).  Newly damaged TRIACs then failm damaging yet more.

At the start of this project I ran many tests on individual TRIACs at the current/voltage/frequency/timing of this use.  I'm over rated dI/dT by about 2x.  With high gate-drive current, this was working in my initial testing, including margin.  I think the problem is statistics.  If any one part in the array of 72 on one board can't handle that stress, most of the board's TRIACs fail.  It's tricky to figure out which parts failed.  Usually failure is not a solid short, limiting options for determining which part(s) failed within each directly-paralleled set of six.

This was planned to go with my DRSSTC:
https://highvoltageforum.net/index.php?topic=798.msg5285#msg5285
Bottom schematic of that initial post shows sketches of this TRIAC switched-MMC project.  I'd already started planning for it as I built my DRSSTC.  If there's any interest, I can post schematics of boards I built for the final (failed) version.  I've also learned a lot about potting GDTs for high-voltage isolation etc.  (72 GDTs in total, one for each set of six directly-paralleled TRIACs.)  Used the best ones at the higher-voltage end, and the ones with more air bubbles at the lower-voltage end.

I've thought about other switch options.  Triggered spark gaps come to mind.  However, I suspect spark gaps are hard to trigger near zero-crossing.  Triggering at higher voltage will dump a bunch of MMC energy into spark gap (and be hard on MMC capacitors with the sudden voltage step).  I'd love to hear other options.  Not planning to try any other ideas at all soon.  Time for other pending projects.  Brainstorming thoughts would still be of interest, however.
David Knierim

Offline Uspring

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Have you considered modifying primary inductance instead of the MMC? You could add some extra coils, which capture part of the primary flux and short them. Their inductances and couplings could be tailored to the voltage and current capabilities of the switches. The switches would be closed initially and then opened as you require more inductance.

My impression is, that many DRSSTCs work well, because arc loading does not only shift secondary res frequency but also lowers Q, so that detuning becomes less problematic.

Offline davekni

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Have you considered modifying primary inductance instead of the MMC? You could add some extra coils, which capture part of the primary flux and short them. Their inductances and couplings could be tailored to the voltage and current capabilities of the switches. The switches would be closed initially and then opened as you require more inductance.
I'd thought about switching inductance early in this project, but didn't have any good ideas for implementing that.  Farther back I'd made a failed attempt to use a smaller TRIAC array instead of a spark gap.  Made about 3 sparks before TRIACs fried.  One issue with a plain TRIAC array is spreading off-state voltage equally among series stages.  That is the advantage of shorting out MMC sections.  The MMC array forces voltage sharing, as MMC capacitance is much larger than TRIAC and other stray capacitances.  Any thoughts on how to implement inductance switching (what to use as a switch)?

Quote
My impression is, that many DRSSTCs work well, because arc loading does not only shift secondary res frequency but also lowers Q, so that detuning becomes less problematic.
Would be interesting to explore more.  Perhaps when I eventually get a chance to scope top-load and breakout currents on my DRSSTC that will provide insight.  My DRSSTC is relatively low impedance, which makes Q reduction less.  When tuned to hit 3m arcs my coil still gets too detuned to couple enough energy.  Primary current ramps up to my 2600A OCD at the end.

Higher coupling would help too.  A larger secondary diameter (lower aspect ratio) would help allow higher coupling before racing sparks.  My coupling is 0.141 if I recall correctly (after reduction to reduce racing arcs).
David Knierim

Offline Uspring

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Any thoughts on how to implement inductance switching (what to use as a switch)?
Not really. In terms of voltage and current capability you'd probably need quite a bit less than your bridge. But I'm not sure you can manage spikes when you turn off the inductors.

Quote
Primary current ramps up to my 2600A OCD at the end.
I don't think that's so bad since you need the power at the end. With ZCS that is not reactive power, independent of the tuning. It will prevent longer bursts, though.

Offline davekni

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I don't think that's so bad since you need the power at the end. With ZCS that is not reactive power, independent of the tuning. It will prevent longer bursts, though.
The problem is that current ramps up at the end because energy transfer to secondary decreases.  Extra current is mostly extra unused energy in primary.  Couples back to bulk cap after enable pulse ends.  I'd rather make use of primary current capability to feed secondary rather than just recirculate energy to primary and back.

Quote
In terms of voltage and current capability you'd probably need quite a bit less than your bridge.
Somewhat lower voltage seems reasonable.  Seems like current might be higher.  Needs to conduct current to initial active primary turns and conduct current induced by those active primary turns.

Thank you for your thoughts and comments.  I enjoy brainstorming ideas.
David Knierim

Offline Uspring

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I'd rather make use of primary current capability to feed secondary rather than just recirculate energy to primary and back.
You're right, I forgot about that. FWIW, a lower bound of the ratio of primary and secondary energy is given by:

Epri/Esec >= (1 - f^2/fsec^2)^2 / k^2  (becomes more equal if coil is more detuned)

with fsec being the secondary res frequency and f the operating frequency. The problem is, that fsec is usually unknown due to the unknown contribution of arc capacitance to it. Interesting is, that although you can decrease primary current by increasing primary impedance, that doesn't help decrease the Epri/Esec ratio.

Quote
Somewhat lower voltage seems reasonable.  Seems like current might be higher.  Needs to conduct current to initial active primary turns and conduct current induced by those active primary turns.
Maybe I'm misunderstanding you, but I thought of extra coil(s) near the primary, which aren't connected to it. The short circuit current would be:

Isc = Ipri * k * sqrt(Lpri/Lsc)

and the not short circuited voltage, i.e. the voltage that the switch must hold:

Vnsc = ω * Ipri * k * sqrt(Lpri*Lsc)

(Isc = short circuit current, Lpri = primary inductance, Lsc = extra coil inductance, k = coupling between primary and extra coil)
The choice of Lsc determines a tradeoff between Isc and Vnsc.

Offline davekni

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Maybe I'm misunderstanding you, but I thought of extra coil(s) near the primary, which aren't connected to it. The short circuit current would be:
OK, I was misunderstanding you.  (I was thinking of a single tapped primary, with tap to one end initially shorted.)  Now that I understand, that is quite an intriguing idea!  Perhaps a properly selected capacitor across this second coil could make switching easier.  Might increase off-state voltage, however, depending on how resonant frequency interacts with coil frequency.  The turn-off voltage spike won't be an issue if turn-off is timed for current zero-crossing.  Caps would help with voltage distribution if switch is formed with series array as in my TRIAC version.

Edit:
Realized that TRIACs will not work for this idea.  Turn-off is much too slow for 80kHz.  (For fast turn-on, I used three-quadrant TRIACs.  Provided a high-current gate pulse that started in the fourth quadrant where TRIAC will not turn on.  When voltage reverses, TRIACs are already enabled, so start conducting.  Still had the issue of how fast current rises, as minority carriers take time to spread across die.)

Nice feature of your isolated coil idea is that this coil can be any convenient turn count.  More turns if there is a solution for higher voltage lower current switching.  In particular, perhaps a fast rotary spark gap would work.  Start of enable pulse could be triggered by motor shaft position the proper time before gap opens.  However, arc quenching might not be fast enough within obtainable gap electrode velocity and air flow.

Thank you!
« Last Edit: October 28, 2022, 04:36:20 AM by davekni »
David Knierim

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