Author Topic: RDRSSTC - Project Build  (Read 15959 times)

Online ZakW

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Re: RDRSSTC - Project Build
« Reply #40 on: January 14, 2024, 09:38:24 PM »
Quote
Looks reasonable, but would be better with slightly more phase lead.  You'll need a bit higher inductance to get enough.
More phase lead. Inductor values: With slug 34.1uH, without 7.1uH.

Currently, I have it about halfway seated. If the goal was to reduce that dip as much as possible I think where I have it set now is it.







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No, this is far too little phase lead.  Slug removed is minimum inductance so minimum phase lead.
Oops, I was looking at that backwards.

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BTW, for a bit of detail, look at the little bumps in bridge out just prior to switching in your first two slug-in scope captures.  In the second of those first two (at 50ns/div), the bump lasts roughly from division 3 to 4, with the main switching starting at division 4.6.  The beginning of that bump at division 3 is when one set of IGBTs turns off.  The end of the bump at division 4 is when current reverses, pulling bridge output back to it's previous value.  Then opposite set of IGBTs turns on starting at division 4.6.  (Current sense trace appears to be ~70ns delayed from reality.  Not sure exactly why, but seems somewhat common.  Perhaps due to parasitics of CT.)  With ideal phase lead, that bump becomes the real output transition and opposite IGBTs turn on just as current is passing through zero, around 100ns more phase lead than you have now.
I appreciate the breakdown, thanks!



The arcs seem to all be splitting, usually into two from the breakout. I have yet to get a single straight arc. In an effort to get straighter arcs I am going to try and increase primary impedance by winding a new primary. Currently I am using high MMC value with few turns. I am going to try and reverse that to see if I can slow arc growth down a bit to reduce branching.

Offline davekni

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Re: RDRSSTC - Project Build
« Reply #41 on: January 15, 2024, 02:50:56 AM »
Quote
Currently, I have it about halfway seated. If the goal was to reduce that dip as much as possible I think where I have it set now is it.
Looks good, though I'd consider setting it for slightly more phase lead still (slug farther in).

Quote
The arcs seem to all be splitting, usually into two from the breakout. I have yet to get a single straight arc. In an effort to get straighter arcs I am going to try and increase primary impedance by winding a new primary. Currently I am using high MMC value with few turns. I am going to try and reverse that to see if I can slow arc growth down a bit to reduce branching.
Sounds like a good plan.  I'm certainly no expert on making single straight arcs, but slower ramp rate fits my limited experience.
Edit:  Another change to try is increasing breakout point length.  Found with my QCW coil that if breakout was too short more voltage was required to start arc (as expected).  That higher voltage caused immediate branching as arc grew rapidly initially.
« Last Edit: January 15, 2024, 03:33:08 AM by davekni »
David Knierim

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Re: RDRSSTC - Project Build
« Reply #42 on: January 18, 2024, 10:40:47 PM »
Hi I'm just lurking around this thread. Do you have a copy of the 3d print file for the igbt clips? They look pretty solid. Thank you for your time.

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Re: RDRSSTC - Project Build
« Reply #43 on: January 19, 2024, 03:31:23 AM »
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Hi I'm just lurking around this thread. Do you have a copy of the 3d print file for the igbt clips? They look pretty solid. Thank you for your time.
Sure happy too!

I just tired uploading the .OBJ file and .stil but I am not allowed to on this site. I will try saving them to a google drive and linking them.

Edit: Sent you a pm
« Last Edit: January 19, 2024, 04:06:50 AM by ZakW »

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Re: RDRSSTC - Project Build
« Reply #44 on: January 19, 2024, 10:06:31 PM »
Bit of an update, in my quest for straighter arcs that split and branch less I am starting to run into an issue. I have tested MANY configurations and so far haven't found a solution yet but I am now noticing some odd behavior from the driver.

I am not sure if it is due to the self-oscillation mod but the driver wont lock onto the primary feedback and oscillate at that frequency. Regardless of what I have the self-oscillation signal set at at, above or below the primary Fres it doesn't seem to kick it out of that mode. It typically oscillates around 250kHz. This occurs the closer I get to matching the primary Fres with the secondary. If it was the oscillation mod I would expect to see the feedback frequency change as I adjust the POT but it doesn't.

Here is an example of what is happening. The coil is running at around 270kHz in the beginning and then switches to running at 397kHz, which happens to be what I measured the secondary Fres at with the current topload and primary in place (open circuit). If I change the primary Fres by added or reducing capacitance I can get the coil to run on feedback again but of course the output suffers. I know that ideally the primary is detuned slightly to compensate for arc loading but I just wanted to share this behavior.

Blue= bridge output
purple= primary feedback across CT resistor

Phase lead isn't ideal either, I was just doing some quick tests.






This shows where the transition occurs.


Any ideas what could cause this? Sometimes the whole on-time of the coil will be with it running around 250-270kHz, primary current (purple) just stays flat around 2 volts depending. When it is operating on primary feedback the current usually spikes towards peak voltage.

Update: So I was messing with it some more and noticed when I turned the self oscillation frequency too high the arcs were curving downward and striking the MMC. I am running it without a topload since arcs seem to be a bit more straight. The low side resulted in louder arcs and more branching.

I was curious to see if the higher self oscitation freq was causing the arcs to curve due to being above the sweet spot (350-450ishKHz).

Purple = CT feedback
Blue = bridge output
yellow = tl3116 pin 7 output.

Overall ramp profile

Zooming in on the beginning we can see it is running at off of the self oscillation frequency +600kHz before it switches to the actual primary frequency. 




I can get straighter arcs by setting the mod closer to the primary Fres but they are still splitting. The only time I managed to get short straight arcs was when I used around 20turns on a primary and low capacitance. Output was poor but they were straight. Any other ideas for how I might get them to stop splitting initially?

« Last Edit: January 20, 2024, 02:24:47 AM by ZakW »

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Re: RDRSSTC - Project Build
« Reply #45 on: January 20, 2024, 06:02:14 AM »
Quote
This shows where the transition occurs.
H-bridge output voltage is varying, probably due to a parasitic resonance of local bridge snubber cap(s) and bulk cap(s).  Such resonances are common and usually not a problem.  However, occasionally they are problematic, such as when at 2x coil operating frequency.  Not sure if this is contributing to any of your issues or not.  You can try adding snubber capacitance or reducing interconnect inductance to bulk caps to see if either helps.
Edit:  Forgot, no bulk caps on an ramped coil.  Perhaps some other resonance between snubber caps or ...

Quote
Here is an example of what is happening. The coil is running at around 270kHz in the beginning and then switches to running at 397kHz, which happens to be what I measured the secondary Fres at with the current topload and primary in place (open circuit).
Looks like switching from lower pole frequency to upper pole frequency.  Much more common problem is reverse of that.  Perhaps upper pole frequency with a bit of arc loading happens to match your measured secondary frequency.

What self-resonant values are you using now?  Did you make any changes per my reply #37?

Feedback amplitude is on the low side of typical.  1000:1 CT may be too high a ratio for your relatively-low-current coil.  I'd consider reducing CT ratio for more reliable feedback.  However, that may make no difference.  Even your low feedback amplitude appears to be sufficient.

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The only time I managed to get short straight arcs was when I used around 20turns on a primary and low capacitance. Output was poor but they were straight. Any other ideas for how I might get them to stop splitting initially?
Yes, slow ramps make for straight arcs.  The hard part is getting ramp fast enough for long arcs while starting smoothly enough to avoid branching.  Being limited to ramp shape of line quarter-cycle is an extra constraint compared to QCW.  However, I see successful line ramped coils here.  Perhaps someone with a good result can offer ideas.
« Last Edit: January 20, 2024, 06:06:23 PM by davekni »
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Re: RDRSSTC - Project Build
« Reply #46 on: January 21, 2024, 10:18:40 PM »
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H-bridge output voltage is varying, probably due to a parasitic resonance of local bridge snubber cap(s) and bulk cap(s).  Such resonances are common and usually not a problem.  However, occasionally they are problematic, such as when at 2x coil operating frequency.  Not sure if this is contributing to any of your issues or not.  You can try adding snubber capacitance or reducing interconnect inductance to bulk caps to see if either helps.
Edit:  Forgot, no bulk caps on an ramped coil.  Perhaps some other resonance between snubber caps or ...
I will try adding some snubber capacitors. My leads from the full bridge PCB to the MMC and coil primary are longer than I want but make testing easier, I know that is not ideal.

Using the formula from Mads site https://kaizerpowerelectronics.dk/tesla-coils/drsstc-design-guide/snubber-capacitor/:

Assumptions:
Ls = 200nH
Ipeak = 200A
Vtransient = 500V
Vbus = 200V

= 88.9nF, just wanted to get a rough estimate.

Quote
Looks like switching from lower pole frequency to upper pole frequency.  Much more common problem is reverse of that.  Perhaps upper pole frequency with a bit of arc loading happens to match your measured secondary frequency.

What self-resonant values are you using now?
5 turns on my primary and 20-30nF for my resonant cap. The issue doesn't seem to show up when I am above the resonant frequency of the secondary. I check my primary output and CT feedback frequency if it is to high I add a small amount (2.2nF) and remeasure, I see the primary frequency drop accordingly but as soon as I get close to resonance (coil with topload = 462kHz) the primary switches to a much lower frequency (around 350Khz), much lower than what adding a single 2.2nF cap would cause.

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  Did you make any changes per my reply #37?
I am missing where the post number is, can you link it for me?

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Re: RDRSSTC - Project Build
« Reply #47 on: January 21, 2024, 10:30:44 PM »
Quote
5 turns on my primary and 20-30nF for my resonant cap. The issue doesn't seem to show up when I am above the resonant frequency of the secondary. I check my primary output and CT feedback frequency if it is to high I add a small amount (2.2nF) and remeasure, I see the primary frequency drop accordingly but as soon as I get close to resonance (coil with topload = 462kHz) the primary switches to a much lower frequency (around 350Khz), much lower than what adding a single 2.2nF cap would cause.
This is normal behavior for standard drivers without self-oscillation.  If primary frequency is slightly above secondary, oscillation is at upper pole.  If primary is slightly below secondary, jumps to lower pole.  Self-oscillation can help force upper pole operation, but only if primary frequency isn't too far below secondary.

Quote
I am missing where the post number is, can you link it for me?
Look at the top of each post to any thread.  There's a line such as this one from your last post:
     « Reply #46 on: Today at 10:18:40 PM »
I'm referring to reply 37 of this thread, 9 posts before your above one.  It's in page 2 of this thread.  In case that isn't clear enough:
    https://highvoltageforum.net/index.php?topic=2651.msg20288#msg20288
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Re: RDRSSTC - Project Build
« Reply #48 on: January 22, 2024, 01:00:02 AM »
Quote
Look at the top of each post to any thread.  There's a line such as this one from your last post:
     « Reply #46 on: Today at 10:18:40 PM »
I'm referring to reply 37 of this thread, 9 posts before your above one.  It's in page 2 of this thread.  In case that isn't clear enough:
    https://highvoltageforum.net/index.php?topic=2651.msg20288#msg20288
Got it, I see the post number now. Missed that earlier.

Quote
Just looked back at your updated schematic from a few posts ago.  C15 will need to be larger than 220pF, ~1nF, to go along with 5K for R6.  I'd recommend changing C15 rather than going so low for R6 value.
I did update the values and it helped to reduce the upper limit frequency. Making adjustments easier.

Quote
This is normal behavior for standard drivers without self-oscillation.
I am confused because I am using self oscillation.

Like you mentioned I probably want to aim for upper pole operation. For my current Secondary I measured the resonant frequency with the primary in place but open circuit. It was around 462kHz with a topload, no wire for streamer loading. So upper pole is going to be a bit above that? That is what I want to tune my primary for, slightly above 462kHz? If that is the case then I also want to run the oscillation mod at or around that frequency as well, right?

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Re: RDRSSTC - Project Build
« Reply #49 on: January 22, 2024, 05:30:27 AM »
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I am confused because I am using self oscillation.
Just mentioning that your experience was matching normal w/o self oscillation.  Appears for some reason self oscillation isn't helping force upper pole frequency.

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So upper pole is going to be a bit above that?
Yes.  How far above depends on coupling (and on primary frequency).  High coupling (generally good for QCW and ramped coils) makes upper pole frequency higher and lower pole frequency lower.

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That is what I want to tune my primary for, slightly above 462kHz?
If self oscillation doesn't work to allow lower primary frequency, then yes.

Quote
If that is the case then I also want to run the oscillation mod at or around that frequency as well, right?
If using self oscillation only to start oscillation and not to force upper pole operation, then yes.

Self oscillation can cause upper pole operation even with primary frequency lower than secondary frequency.  That's what my QCW coil does.  However, I think that works best when primary-to-secondary coupling is high.  My QCW coupling is higher than most at 0.7.  I think one or two other forum members have had success with self oscillation forcing upper pole with coupling around 0.4 or 0.45.  Not sure if anyone has tried with lower coupling than that.
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Re: RDRSSTC - Project Build
« Reply #50 on: February 14, 2024, 01:58:17 AM »
Started tinkering again after a short break. Seems like I was able to fix a couple issues, but splitting arcs is my main problem now.

Significantly shortening primary connections and increasing coupling seems to have fixed the pole switching issue as well as the primary not changing its frequency when the tank cap is adjusted. Wrapping the primary directly to the secondary outer former I was able to get a coupling of 0.57k, per JavaTC.

Arc splitting:
  • I have tried everything I can think of to get the arcs to be straighter. So far, the best I can get is without a topload, the arcs are long but they split at the breakout point to form a V but it is very consistent. Both arcs are about ~21in long. With a topload I get several main arcs that then split along their length as well.
  • I have tried increasing primary turns to around 13 all the way down to 2. Higher turns at lower voltage produces much shorter but straighter arcs, at higher input voltage they begin to split all the same. Lower turns significantly increase arc current but can lead to more splitting. 5-6T seems to be the sweet spot.
  • I tested short stubby coils as well as long tall coils, geometry doesn't seem to make a major difference. Best results so far with the shorter coil.
  • Running the coil at higher Fres doesn't seem to reduce splitting either
Looking back on my RSSTC build, I could adjust the primary height to fix arc splitting. Lower primary made for shorter straighter arcs, while raising it caused the arcs to get longer it also made them split at a certain point. Adjusting the primary height with this build doesn't seem to have the same effect if any really.

Could a full bridge DRSSTC simply be supplying too much power to the coil for such a short ramp time with arc splitting being largely unavoidable?

Any ideas or advice would be appreciated.

-Zak

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Re: RDRSSTC - Project Build
« Reply #51 on: February 14, 2024, 05:32:30 AM »
Quote
Could a full bridge DRSSTC simply be supplying too much power to the coil for such a short ramp time with arc splitting being largely unavoidable?
Certainly one possibility.  Ramped coil doesn't allow changing ramp rate as a QCW coil does.  Another possibility is that feedback doesn't take over from self-oscillation at low enough voltage.  Scope primary current during ramp.  If it jumps up suddenly too far into the ramp (at too high line voltage), that sudden start may be causing branching.  Sudden jump in current may happen when feedback takes over, making frequency match (presumably upper) pole frequency.  If that is the issue, adjust self-oscillation frequency to more closely match upper pole frequency.  (Match frequency just before current jump to frequency after.)
« Last Edit: February 14, 2024, 06:07:17 AM by davekni »
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Re: RDRSSTC - Project Build
« Reply #52 on: February 14, 2024, 06:25:45 PM »
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Another possibility is that feedback doesn't take over from self-oscillation at low enough voltage.  Scope primary current during ramp.  If it jumps up suddenly too far into the ramp (at too high line voltage), that sudden start may be causing branching.  Sudden jump in current may happen when feedback takes over, making frequency match (presumably upper) pole frequency.  If that is the issue, adjust self-oscillation frequency to more closely match upper pole frequency.  (Match frequency just before current jump to frequency after.)
*I will edit this post and attach the scope capture later.*

I forgot to mention a couple other changes I made. I reduced gate resistance for each IGBT from 15ohms to 10ohms and shortened the GDT output connections.

To your point when I was testing the other day, I probed the self oscillation output, CT output and primary. With the changes I made the self oscillation appeared to switch as soon as the ramp starts. I did not zoom in super close but the current ramped up smoothly as expected (like what I would see with my SSTC). I will post the capture for this later.

The oscillation mod is acting differently too (in a good way), it is more sensitive and usually has to be set quite high. Before it would work below or above resonance. I think Rafft had a similar experience with his QCW coil. It typically runs somewhere around 650kHz, going far above that causes no oscillation and running at a lower frequency causes primary to secondary arcing. Again, a similar issue I had with my RSSTC.



EDIT: Scope captures.

Yellow=Self oscillation output
Purple=primary current via CT
Blue=Primary output

Self oscillation is running around 781kHz before the coil turns on. Looks like that drops to 625kHz on startup and then all the way down to 490kHz at the halfway point.









« Last Edit: February 15, 2024, 05:57:24 AM by ZakW »

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Re: RDRSSTC - Project Build
« Reply #53 on: February 15, 2024, 07:11:20 PM »
Quote
EDIT: Scope captures.

Yellow=Self oscillation output
Purple=primary current via CT
Blue=Primary output

Self oscillation is running around 781kHz before the coil turns on. Looks like that drops to 625kHz on startup and then all the way down to 490kHz at the halfway point.
Scope captures all look good.  Thank you for posting.
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Re: RDRSSTC - Project Build
« Reply #54 on: February 16, 2024, 03:50:58 AM »
Had my first bridge failure. Not bad considered I killed around ~15 or more IGBTs & MOSFETs with my RSSTC.

OCD did not seem to trigger when it failed. I might have it adjusted too high.

I did have moderate success with some initial testing to reduce arc branching. I added a small wire wound inductor on the primary output in an effort to limit the initial current to the primary. I was only able to mess with the coil and look at the scope for a bit before it failed. But it managed to reduce branching quite a bit! Primary current was much lower for ~1.5ms or so before ramping up as usual, I think this is what helped to reduce branching. The coil failed after reducing the tank cap. I will have to take a look at it more this weekend and see what I can find out and do some more testing.

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Re: RDRSSTC - Project Build
« Reply #55 on: February 17, 2024, 08:56:42 PM »
Quote
Primary current was much lower for ~1.5ms or so before ramping up as usual, I think this is what helped to reduce branching.
Agree, that sounds likely.  Slower start helps reduce branching.  However, whatever is causing that change 1.5ms into ramp might be a cause of failure.  Only guess that comes to mind is that feedback isn't taking over from self-oscillation for initial 1.5ms under conditions of this test.
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Re: RDRSSTC - Project Build
« Reply #56 on: February 17, 2024, 10:20:39 PM »
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However, whatever is causing that change 1.5ms into ramp might be a cause of failure.  Only guess that comes to mind is that feedback isn't taking over from self-oscillation for initial 1.5ms under conditions of this test.
That is what I was thinking too but I did not get the chance to do enough testing. Since I haven't had a failure until recently these are the original IGBTs and I think I have stressed them A LOT. I noticed some uneven heating in two of the IGBTs before they failed so I think they were already compromised.

I will do some more testing and post my results.

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Re: RDRSSTC - Project Build
« Reply #57 on: May 18, 2024, 01:55:42 AM »
Hello again,

After a nice 3 month break I want to pick up where I left off. I'd like to start with lessons learned so far in my initial full bridge design and how I plan to overcome them in later iterations. I made several design mistakes that ultimately led to the bridge failing repeatedly. I would also like to take a moment to highlight that making mistakes is how you learn, and you can only help yourself by learning the most you can from them. That is why I am sharing my mistakes so as to help others avoid the same pitfalls.

Mistake #1 - PCB Mounting Hole Clearance
I used two mounting screws and a 3D printed spacer to secure the full bridge PCB to the large heatsink base. As you can see from the pictures either the silkscreen failed or the screw (when tightened) scratched through the silkscreen enough to cause it to short out. This issue coupled with my second mistake led to several more failures as I continued to troubleshoot. For high power/voltage connections do not rely on the silkscreen for adequate insulation!




Proposed solution: I plan on either using much more clearance around the mounting hole or mounting the PCB in another way.

Mistake #2 - IGBT Heatsink Isolation
As you can see from the pictures the plan was to use small blocks of aluminum to help rapidly pull heat away from the part so it could then more slowly dissipate through the silicone thermal pad into the larger heatsink. My mistake was not adding enough clearance for the through hole drilled in the aluminum block. This essentially rendered the thermal insulation pad useless and led to intermittent shorts between the other IGBTs via the main larger heatsink.





Proposed solution: I have redesigned some 3D printed clips for the IGBTs. The clip itself will mount to the heatsink and then press the body of the IGBT into the heatsink. This will maintain the benefit of ‘pressing’ the part for better heat transfer while also removing the issue surrounding shorting the collectors together.




Mistake #3 - Bridge Power Input Design
The UD1.3 driver I am using has a built in ZCD that receives a small AC signal from a mini signal transformer on the full bridge. That needs to be powered on (connected to mains) for the controller to work. The way I had the PCB traces routed would not allow me to insert a power switch without also disconnecting power for the AC signal transformer. To get around this I used the fuse mounting points for a switch and inline fuse instead.



Solution: Adjust the layout so a switch can be added to control bridge power while keeping the signal transformer powered.

Mistake #4 - PCB Layout & IGBT Lead Length
As you can see from the pictures the lead length for each part is much longer than anticipated. In order to have enough clearance for the underside of the PCB I had to raise it up to the point where the leads had to be long in order to connect.




Proposed solution: I am redesigning the bridge to ensure better clearance and shorter lead lengths. Additionally, I will be switching from a full bridge design to a half bridge as I continue to test my designs.

Once I redesign the bridge and receive the new boards I will continue testing ways to reduce arc branching. A promising lead I discovered before the bridge failed was adding a small air core inductor in series with the primary. I was unable to get any scope captures but I was able to visibly see a smoother ramp in the initial current as well as the arcs being noticeably straighter and often only a single arc would form. Which is very promising!

Here is a quick video of the performance I was able to get from the coil. The first video you can see the output is decent but has many branches, the second video was after I adjusted coupling, primary turns, tank cap, shortened leads, and reduced the top load size. That resulted in two arcs usually which was the best that I could get with the current configuration.


I suspect that the output branches so much because I cannot adjust the ramp input (like a typical QCW) combined with the increased power of a dual resonant full bridge. Because of that the branching may be inherent with the design, however, after seeing the improvement the inductor made to the output I am hopeful that I will be able to get even better performance yet. The half bridge may also function to reduce overall output power and thus help with branching.

Every project, mistakes are made and lessons are learned  ;D I plan on doing something with all of these parts someday, maybe pouring epoxy over them to make some coasters or something... These are all the parts I have accumulated over the last couple of years.


I haven't started on the redesign for the half bridge yet so it will take some time.

Stay tuned!

-Zak
« Last Edit: May 18, 2024, 09:54:33 AM by ZakW »

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Re: RDRSSTC - Project Build
« Reply #58 on: June 02, 2024, 12:41:50 AM »
Update on my progress so far, I decided not to create a new PCB for the bridge quiet yet and instead opted to create a low inductance half bridge from copper foil tape. So far so good.

My main goals: arc appearance (straight as possible), arc length, arc length to secondary size.

Here is a video of what all of my tinkering has led to, solid 19in arcs @120v input with little branching.

https://www.youtube.com/shorts/_QRPqyiH22c

/>
Currently, I am still thinking that due to the short ramp time of ~8ms that mains ramped coils have to operate in, there is only so much that can be done to boost arc length at the cost of increased branching. Both ramped SSTC and DRSSTC do not have any issues hitting 12-15in sword arcs, it is when you try and get every last bit of power from the coil where tuning becomes so critical.

IGBTs are mounted on a small heatsink and do not heat up whatsoever.

Setup:
  • Primary = 2T 14awg wire
  • 4.1uH air core inductor in series with the primary (more on this later)
  • Half bridge (more on this later), with reduced DC split rail caps 0.33uF instead of normal 1uF.
  • Very small topload (more on this later)
  • Resonant MMC = ~94nF
  • Secondary feedback instead of primary (more on this later)

Primary turns - anything more than 2 turns and the arc length tanks, 3-4T gives a max of like 10in arcs :(

Series inductor - the goal here was to add some inductance to slow the inrush of current into the primary. So far I think it is working as intended but I still plan to test the coil without it. Another thought is that I am getting the advantage of only having 2T on the primary so there is more voltage present on the secondary while the additional resistance from the inductor is being mitigated by the resonant capacitor, might not be correct…

Half bridge - after the full bridge died I built a half bridge to continue testing, and reduce part usage in case something else failed. I noticed the bridge output was very square, and not sinusoidal-ish like my previous RSSTC. Being that both coils used around 2T on the primary I reduced the DC split rail caps from 1uF to 0.33uF, this improved output by a couple inches. Smaller DC split rail caps respond more quickly to changes in current, providing a more stable current output to the primary.

Topload - Smaller toploads seem to work much better. Even a large washer is sufficient. I am not sure if this is because I am using tiny coils with high res frequency wound with thin wire but the output is branched and short with most toploads I have tried regardless of tuning. More on this later.

MMC - this is so large due to the added inductance. I need to buy some larger caps so I am not dealing with so many. All are ~2000v DC caps that I HAVE NOT soldered any in series to increase voltage rating, so far none have heated or failed. My assumption is that the voltage doesn’t have time to ring up to such high levels compared to a traditional DRSSTC?

Feedback - From all my testing I think it safe to say that for a mains ramped coil, secondary feedback works best. I could not get anywhere close to the level of optimization when using primary feedback nor could I get reliable operation. When using primary feedback minor adjustments caused large swings in behavior and output.

OCD - I am still using the OCD CT so hopefully that will shut the driver down in the event of over current. OCD has not tripped with the half bridge. I even turned down the threshold from max 3.03v to around 2.5v if I recall.

Current measurement - using the primary current CT with a 51 ohm burden resistor to monitor current ramp.

Scope captures & findings: Blue = Bridge output (differential probe) Purple = primary CT with 51 ohm burden resistor

Ideal current ramp - Example from the video above

  • Ideal tuning of C, L, and primary height
  • Arcs sound much more like QCW arcs instead of normal ramped arcs
  • Little to no branching
  • Arcs do not start getting long until ~100v input

Too much current too soon

  • Current is ramping too much before half wave peak
  • MMC to high
  • Primary could be set to high also
  • Coil detuning to resonance too early
  • arcs begin to split and branch

Normal current

  • Short but straight arcs
  • Sounds like RSSTC
  • Not optimized, needs tuning
  • Works on lower voltage input


My understanding & theory:
Once sufficient voltage is applied to the bridge (~100v) the coil initially starts oscillating way too high and far away from resonance for the given primary tank capacitance and inductance. Therefore resonant energy transfer is low. As the arc starts and begins to grow it begins detuning the coil pulling it lower. This is exacerbated by not having a topload to stabilize frequency, which I think in this application is an added benefit. This cycle continues as the arc grows causing more and more energy to build steadily rather than sharply. This leads to straighter arc formation and less branching.

Tl:dr - as arc length increases, frequency decreases, resonant energy transfer increases.

Please poke holes in my theory. That is what I have concluded so far and would love to hear some feedback from others.

-Zak
« Last Edit: June 02, 2024, 12:56:05 AM by ZakW »

Online Benjamin Lockhart

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Re: RDRSSTC - Project Build
« Reply #59 on: June 02, 2024, 08:36:07 AM »
This is interesting!

An off-axis series inductor will lower the effective coupling, so that's something to bear in mind. It may not actually give you more secondary voltage, I'm not sure.

High Voltage Forum

Re: RDRSSTC - Project Build
« Reply #59 on: June 02, 2024, 08:36:07 AM »

 


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