13.56MHz ISM frequency HFSSTC (or perhaps HFDRSSTC)

[davekni]

For comparison, I made a 13.56MHz (more common ISM freuency) HFSSTC.  As with my initial 6.78MHz version, gate drive is from a crystal oscillator, not from drain feedback.  The arc plasma behaves much more like a flame at 13.56MHz than at 6.78MHz.

Circuit is similar.  Ended up with 26pF of external drain-source capacitance.  Not planned initially, but routing FET source (ground) as a plane adjacent the heat-sink (FET drain) added this capacitance.  As Steve pointed out, added capacitance widens drain pulses, lowering peak voltage.



Running inside at 450W (90V 5A) from bench supplies:



Simulation schematic:  (Full SiC FET part number is NVH4L160N120SC1)



Ran into one new issue initially.  Since these are actually dual-resonant (DRSSTC), the upper pole ended up at the second harmonic (27.12MHz).  Here's a scope capture at low power (no arc) showing the harmonic.  Black is SiC FET gate (at 5V/div.  Probe readout pin is missing), green is FET drain, cyan (light blue) is one side of GDT input (for trigger), and red is antenna (scope probe) near secondary:



Reducing the breakout size fixed the harmonic issue by raising the upper pole frequency above 2x lower pole.  Perhaps second-harmonic isn't really an issue.  I never ran it that way at high power.  Arcs are larger than the initial secondary structure, but are damped (resistive) enough to not show significant second-harmonic.

After fixing, here's scope traces running at 450W:



Same scope traces except without gate, running ~900W in my garage:



Running normally with carbon rod breakout, up to 1.1kW DC input power:

/>
There is room to push power higher, as drain peaks are aroun 800V.  For now it is limited by the voltage of rectified 120VAC line.

With glass tube over stainless for sodium yellow:

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Strontium chloride on breakout for red:

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Boron (ammonium borate) for green:

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Finally, just for fun, steel spring breakout (sparkler):

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[Weston]

Looks cool! And even better, the 13.56MHz ISM band is international without conditional approval like the 6.78MHz band 

It looks like you are using the AOT42S60 as a varactor of sorts? That seems like a cool technique. What capacitance / tuning range do you get out of it?

How well does your arc model match the measured results? I have been wanting to make another HF coil and try to synthesize a matching network that leads to better self starting behavior but have been hindered a lack of an arc model.

[davekni]

How well does your arc model match the measured results?

Waveforms are reasonably close.  However, I can find other sets of simulation values that produce similar results.  If I had access to higher-frequency impedance analyzers or signal generators, characterizing winding parasitics and interconnect parasitics would eliminate some of the value guesses, allowing more certainty on the arc model.

It looks like you are using the AOT42S60 as a varactor of sorts? That seems like a cool technique. What capacitance / tuning range do you get out of it?

Yes, "of sorts" is the key phrase.  Drain capacitance is highly non-linear.  At 0Vdc, drain voltage is about 30Vpp, so almost a short.  At 300Vdc, drain voltage is about 250Vpp.  (Unfortunately I can't find my notes on that voltage.  May have been 230Vpp or 270Vpp.)  At that voltage the two FETs have 200pF total, so 1.2nF when combined with the 1nF fixed capacitance in parallel.  With lower voltage, say 50Vdc, the waveform is quite distorted - little swing on the negative half-cycle and more on the positive half-cycle.  This non-linearity doesn't matter much, only average capacitance.  For one, it is in series with the main 75pF vacuum capacitor with ~4kVpp.  Second, this primarily-second-harmonic distortion doesn't affect overall arc generation.  Resulting range is ~5% capacitance (~71pF to ~75pF), for ~2.5% frequency range.  Since AOT42S60 is good for 600V, there is room to increase range by reducing the 1nF parallel capacitance (implemented as 5 parallel 200pF 2kV 1206 ceramic capacitors).

BTW, the spring-breakout (sparkler) video shows self-starting, as the spring wire is small diameter.  The carbon rod can self-start if sharpened.  However, it quickly erodes to a rounded end that doesn't self-start.  I'm wondering if SiC would keep a point any better.

[T3sl4co1l]

FYI, gate capacitance is apparently quite trans-linear, the downsides being high resistance (for power devices anyway) and low voltage range (-Vgs(max) < Vgs < Vgs(th)).

Not sure if RF devices exhibit the same response; it may be specific to VDMOS and not LDMOS.  That is, I would expect LDMOS may have more Cin(Vgs) dependency than VDMOS (which has essentially only Cin(Vds) dependency).

Tim

[Uspring]

Another interesting post by davekni beyond the borders of known TC technology. 
From your arc load circuit, I get a peak voltage of about 5 kV for 900W. Explains, why you don't get a self starting breakout, since also the secondary fres is quite high initially. There is probably not much of a resonance effect then.
I wonder if the thick flame like arcs are due to the CW nature of your coil or to the high frequency. Possibly the difference in appearance of the 6 and 13 Mhz arcs results from larger repulsive space charges at the lower frequency.

[davekni]

From your arc load circuit, I get a peak voltage of about 5 kV for 900W. Explains, why you don't get a self starting breakout, since also the secondary fres is quite high initially. There is probably not much of a resonance effect then.
I wonder if the thick flame like arcs are due to the CW nature of your coil or to the high frequency. Possibly the difference in appearance of the 6 and 13 Mhz arcs results from larger repulsive space charges at the lower frequency.

Yes, voltage is low.  The 6.78MHz version was a bit higher, but still low compared to normal coils.

CW does make shorter thicker arcs.  Both of these HFSSTCs run from DC with relatively little ripple.  My 100kHz SSTC isn't quite CW, as it runs from full-wave-rectified 60Hz without bulk capacitors.  It's arcs are still fairly short and thick, but not at all flame-like.  Look more like short thick versions of my 100kHz QCW coil arcs.  Concerning 6.78 vs 13.56MHz, it may be less space-charge at 13.56MHz since voltage is lower, and/or more randomness in the spatial location of the space-charge repulsion.  Don't have any good ideas for experiments.  Any attempt to probe with anything conductive causes a heavy arc to the conductive object (as in starting the arc).

[davekni]

I'd really like to have self-starting capability for this HFSSTC.  So far, all the HFSSTCs I've seen including this one require arc initiation by holding some conductive object near the breakout point.  Anyone have self-starting HFSSTC examples to share?

The issue is that a sharp breakout point is necessary to start an arc automatically.  I can sharpen the graphite rod, but the flame wears it back to rounded.  Sharp tungsten glows bright white at the tip, blinding out the flame.  Other ideas for a robust sharp point are welcome!

Lacking a real solution, I made a little "cheat".   I've drilled a small hole in the graphite rod end.  Before each start, I place a new fine copper wire strand in the hole, sticking out the top.  It quickly melts away after starting the arc flame:

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BTW, it will occasionally self-start with the rounded tip, especially just after a run when the tip is still hot.  Fried an SiC FET pushing the voltage higher trying for self-start.

I'm wondering if industrial-quality diamonds have enough impurities to be sufficiently conductive at room temperature.  If so, anyone know how to mount one?  Perhaps would need significant contact area with copper to conduct heat away.

Would silicon carbide hold a point any better than graphite?

[davekni]

Two more failed tries at self-starting:

Bought an industrial diamond, as long and thin as I could find without paying too much.  Its electrical conductivity at room temperature was much too low.  Held it in an alligator-clip up to a running arc.  Arc jumped around the diamond.  Never any hint of arc to the diamond.

Then bought an SiC wireless heating element.  Cut a somewhat-pointed tip using a diamond wheel.  Wasn't quite sharp enough for self-starting.  Tested it by normal manual starting.  At 1kW, the tip was slowly melting and burning to a more rounded shape.  Point eroded perhaps more slowly than graphite, but definitely not surviving sharp enough for self-starting.

Setting this project aside unless I hear of another reasonable option to try.

[alan sailer]

I offer this hesitantly since your power is so much higher, but here goes...

When I was running my much lower power set-up (maybe 120 watts) a friend wanted me to try various electrodes.
One of them was iridium, both as a wire and using an iridium spark-plug electrode. Both worked and self-started. I
didn't do any life testing as I liked the color of the tungsten rod. It self-starts when the rod is pointy fresh but that
soon goes away.

If you had a bucket of money I suspect that a large diameter iridium rod with a pointed tip might work. My theory is
that the large rod would conduct the heat away from the tip fast enough to keep it stable. Like any theory it could
easily be proven wrong by experiment. But I'm too cheap to do that experiment.

Cheers.

[Uspring]

Your secondary resonance frequency is probably way above the operating frequency at breakout, since you probably tuned for the max output when you have an arc with its capacitive loading. Possibly some retuning might help to get more voltage at breakout time.

Another idea is to have a breakout point at the side of the electrode, so that the arc travels up to the tip and does not heat up the the breakout point after ignition. Dunno if this works. You probably tried that.

A third idea is to heat up the electrode locally on top before you power up the coil. That will create a small pocket of hot and thin air with a lower breakdown voltage. If you heat the spot up into the region of thermionic emission, that might help, too. It would be somewhat like the ignition of a hot cathode fluorescent tube. As an experiment leading up to this, you could try heating the top electrode locally with a little torch before you power up.
You should be careful of getting the torch and yourself out of the way before applying power 
Better is, of course, some means to heat up the top electrically.

[Duane B]

Going along with some ideas by Uspring, you could wind the secondary bifilar, then you would be able to send up a DC (or AC) voltage to the top of the coil to make a small ignition spark or heat something up.

In our linear accelerators there is a pulse transformer that develops 125 kV at around 85 amps. The secondary of this pulse transformer is bifilar wound so it can send up 240 vac to power a klystron filament transformer to produce 7.7 volts at 30 amps (elevated at the 125 kV voltage)

Another idea may be to make an AC ground at the base of the secondary with a capacitor, then send a DC voltage up the secondary to start corona.

[davekni]

Thank you all for suggestions!

If you had a bucket of money I suspect that a large diameter iridium rod with a pointed tip might work. My theory is
that the large rod would conduct the heat away from the tip fast enough to keep it stable. Like any theory it could
easily be proven wrong by experiment. But I'm too cheap to do that experiment.

I do spend money on experiments, but not enough for this one.  Would be much more than the $65 I spent on a diamond.  I also wonder if iridium would cool well enough to not glow blinding-white.  Tungsten has slightly higher thermal conductivity than iridium and stays sharp longer than other tips I've tried.  However, it glows so bright that the arc flame is difficult to view.

Your secondary resonance frequency is probably way above the operating frequency at breakout, since you probably tuned for the max output when you have an arc with its capacitive loading. Possibly some retuning might help to get more voltage at breakout time.

I've tried tuning some.  Can't get very much voltage increase without losing class-E operation.  A higher-impedance design would likely produce self-starting, but then not allow 1kW with class-E.  Load impedance drops (semi-constant arc voltage) as power increases, as you know.

Another idea is to have a breakout point at the side of the electrode, so that the arc travels up to the tip and does not heat up the the breakout point after ignition. Dunno if this works. You probably tried that.

Yes, I've tried that accidentally with unintentional sharp points.  Arc generally locks to that sharp point until the side point burns/melts away.

A third idea is to heat up the electrode locally on top before you power up the coil. That will create a small pocket of hot and thin air with a lower breakdown voltage.

Yes, hot does work.  Arc does restart when the carbon rod is still hot from immediately-previous operation.  Don't think I'll bother with the complexity of bifilar winding to bring heating power to the tip, though.

Going along with some ideas by Uspring, you could wind the secondary bifilar, then you would be able to send up a DC (or AC) voltage to the top of the coil to make a small ignition spark or heat something up.

Spark might be even harder, as bifilar winding would require HV insulation.  If I ever run out of new project ideas  perhaps I would build bifilar heating.

Another idea may be to make an AC ground at the base of the secondary with a capacitor, then send a DC voltage up the secondary to start corona.

Without a sharp point, voltage to make DC corona would be very high and therefore difficult.

Somewhat similar to the bifilar ideas, I have considered winding with capillary tube.  Then perhaps the arc would self-start with a small flow of argon or helium exiting the tip.

More suggestions are welcome!  It is fun to discuss ideas even when too expensive or difficult for actual testing.

[Steve Ward]

The simple way of auto-starting the discharge is to insert a ~1" piece of ~26-30awg bare copper wire into a small hole drilled into the top of the carbon electrode.  The sharp tip will initiate even a tiny discharge and then the copper will simply melt down to a small ball that resides in the hole for the duration of the experiment while the carbon electrode takes over.  Of course, you have to reload the wire each time.

Thanks for sharing, very nice to see it works so well with fixed driving frequency.  I notice the freq is pretty constant despite arc load on my self-oscillating types. I find the controlled gate drive appealing, and lack of high speed PLL also appealing. 

[davekni]

The simple way of auto-starting the discharge is to insert a ~1" piece of ~26-30awg bare copper wire into a small hole drilled into the top of the carbon electrode.  The sharp tip will initiate even a tiny discharge and then the copper will simply melt down to a small ball that resides in the hole for the duration of the experiment while the carbon electrode takes over.  Of course, you have to reload the wire each time.

Thank you for confirming my "cheat" solution.  That is exactly what I used in Reply#6 above.

Thanks for sharing, very nice to see it works so well with fixed driving frequency.  I notice the freq is pretty constant despite arc load on my self-oscillating types. I find the controlled gate drive appealing, and lack of high speed PLL also appealing.

I think the arc ends up being so low-Q that it adds more loss than detuning.

[曹靖]

Perhaps you can try heating the tip - as long as the tip is heated, it is easy to automatically spray the arc

[davekni]

Perhaps you can try heating the tip - as long as the tip is heated, it is easy to automatically spray the arc

Yes, heating does work, as you can read a few posts up.  Restarts easily if done before carbon rod tip cools down from previous operation.
Laser heating is a new idea.  Don't think I'll go that route due to safety concerns.  Sufficient laser power to heat requires viewer eye protection.

[曹靖]

Yes, high-power lasers pose certain risks and are not cheap :'(

[davekni]

More details about gate drive since there was some interest:

First, a slight update to the overall HFSSTC schematic.  In particular, added L3 and R6 to damp amplitude resonance.  Not needed as long as power is ramped up slowly.  If power is applied suddenly, L13 (supply series inductor) and class-E stage form an LC resonant circuit.  Class-E stage behaves like a capacitor at low frequency due to energy stored in man resonant cap C2 (75pF).  Effective capacitance is higher than 75pF, as energy stored in C2 is much higher than would be if it had just the 160Vdc supply voltage across it.  (Same issue occurs with standard ZVS induction oscillator circuits.  Power feed inductor combined with oscillator stored energy form a resonant circuit.)



Gate drive parts are on a 43mm x 28mm x 0.8mm ECB, thin to minimize parasitic inductance.  GDT and 80uH input inductors are not on ECB directly.  GDT is 5 turns of twisted pair (from ethernet cable) on NiZn ferrite core.  GDT is hottest part, about 60C in center.  Wire is hotter than core.  Should have used solid wire instead of stranded.  AO3422 FETs are ~40C on top of case.  This is with 22C ambient.

Schematic:



Top side of ECB with input inductors above and GDT to the right.  Two-turn common-mode choke after GDT, also on a 4S2 NiZn ferrite core.  Made GDT first, then cut lead length down to get desired 240nH leakage inductance.  SiC FET gate capacitance is about 1nF when effect of Cgd is included.  Capacitance across GDT input is also about 1nF with AO3422 drain capacitance and ECB capacitance included.  Thus about 500pF for the two in series.  240nH GDT leakage inductance is designed to resonate at 13.56MHz with this 500pF capacitance.  Causes a polarity inversion (180 degree phase shift) from driver output to gate.  Inversion doesn't matter for this open-loop gate drive.



Picture showing bottom side of gate drive ECB with patched-on 1N4148 diodes and TVS diode to clamp amplitude in case supply voltage ramps up very quickly causing overshoot through input 80uH inductors.



Side view showing copper-tape rectangles for gate parts after GDT (AC coupling cap and clamp diodes):



View with 75pF vacuum capacitor removed for better look at gate layout.  There is a 100um copper foil ground sheet behind that separated from live heat sink by ~1mm thick polyethylene sheet.  This adds 25pF from FET drain to source (ground), and shields gate drive from drain (from drain-connected heat sink).  Coax cable visible in picture is for scoping Vgs.  It has a series termination resistor (inside tape) from gate to coax center.

[曹靖]

Wow~Important information! I am very excited to see such a low-power driver for the first time. Thank you David for sharing the details of this part!
Hello David~As I don't have the components in the circuit diagram~I can only use the existing devices in my hand to build a circuit similar to yours on the ECB~My power supply voltage is only 5V~FET is NVH4L080N120 from my previous post 12MHzHFSSTC~I found that using a 1NF capacitor (actually two 2.2 nF series connected) to equivalent the FET gate capacitor can obtain 20V (± 10V) The driving voltage may be caused by the difference in the devices we use, as you mentioned. The 1nF capacitor simulated your FET device and it can indeed obtain sufficient driving voltage. I also know that my FET needs to be adjusted more times due to the double increase in gate capacitance compared to yours. However, I have made adjustments before receiving your reply and cannot obtain a higher gate driving voltage

[davekni]

I can only use the existing devices in my hand to build a circuit similar to yours on the ECB

Using your existing parts for my ZVS drive topology will be difficult.  IRF610 needs higher gate voltage, and has significant internal gate resistance.  74HC14 is rather slow for 12MHz and output current is low for driving IRF610 gate even with 5 paralleled.
Your SiC FET has slightly higher internal gate resistance besides ~2x gate capacitance, 1.7 ohms typical vs. 1.4 ohms typical for the lower-current part I'm using.  That will consume some gate drive power, ~2W at 20Vpp.  (In my version, SiC FET gets a bit warm with just gate drive applied, at 30Vpp and 13.56MHz for mine.  Likely around 2W for me too.  I picked that SiC FET partly because of it's fast gate time constant, low R and low C.)

If you want to work with your existing parts, I'd suggest a few changes:
74HC14 is specified to 6V.  Will typically work at 7V.  7V would provide more reasonable Vgs for IRF610 parts.
Use two more inverters from oscillator output to feed second 5x parallel gate drive stage.  That will reduce delay skew between the two IRF610 gate signals.  Perhaps even add a small R/C delay on input to the single inverter (R between oscillator output and inverter input) to match delay with the two-inverters.

Good luck!

[曹靖]

Using your existing parts for my ZVS drive topology will be difficult.  IRF610 needs higher gate voltage, and has significant internal gate resistance.  74HC14 is rather slow for 12MHz and output current is low for driving IRF610 gate even with 5 paralleled.
Your SiC FET has slightly higher internal gate resistance besides ~2x gate capacitance, 1.7 ohms typical vs. 1.4 ohms typical for the lower-current part I'm using.  That will consume some gate drive power, ~2W at 20Vpp.  (In my version, SiC FET gets a bit warm with just gate drive applied, at 30Vpp and 13.56MHz for mine.  Likely around 2W for me too.  I picked that SiC FET partly because of it's fast gate time constant, low R and low C.)

If you want to work with your existing parts, I'd suggest a few changes:
74HC14 is specified to 6V.  Will typically work at 7V.  7V would provide more reasonable Vgs for IRF610 parts.
Use two more inverters from oscillator output to feed second 5x parallel gate drive stage.  That will reduce delay skew between the two IRF610 gate signals.  Perhaps even add a small R/C delay on input to the single inverter (R between oscillator output and inverter input) to match delay with the two-inverters.

Good luck!

Thank you to David for providing the method. Before you replied to my message, I had already redesigned a new circuit using ECB. The new circuit uses a 24MHz crystal oscillator and a D trigger to form a binary frequency division, resulting in 12MHz. Since the D trigger happens to have two opposite outputs, the delay of the two signals has been reduced compared to the old circuit. Today, I saw your message and adopted your suggestion to provide a voltage of 6.5-7V for the 74 series IC. The effect is very significant. I have received the connection Near ideal gate voltage~

[davekni]

Since the D trigger happens to have two opposite outputs, the delay of the two signals has been reduced compared to the old circuit.

Yes, that is exactly why I used a DFF.

You are amazingly fast building new versions!  Any time left for the rest of life?

I have received the connection Near ideal gate voltage~

Have you scoped the GDT input signals (the two FET drains)?  Are they reasonably clean half-sine-wave signals?  Or are IRF610 FETs a bit slow for that?  What amplitude?  Perhaps none of this matters if you are happy with the result.  If you want a little higher amplitude on SiC FET Vgs, that may be possible by adding a little more capacitance across GDT input (between IRF610 drains) and making GDT lead wire a bit shorter to keep in tune.  This presumes IRF610 drain waveforms are reasonable now.

BTW, I also responded to your other thread on possible changes to your older gate driver that may help with tuning and efficiency.

Hope all goes well!

[davekni]

In a few years, I will be thirty years old. There is an ancient Chinese saying that goes, 'I have five out of ten and am determined to learn, and at thirty, I stand tall.' It means that when a person reaches the age of 30, he must be able to stand on his own feet. But I haven't done anything yet. I dropped out of school very early. Maybe at the age of 16, he could only do some lowly jobs because of his low education. His income was very meager, so he didn't starve to death. But fortunately, I still have a hobby like making Tesla coil. Although this love has not helped me to earn money, it also adds a little bitterness to my hard life

At least here in US, sometimes there are a few companies that will recognize talent like yours and hire engineers in spite of not having formal engineering education.  I was offered my first first full-time engineering job (at Tektronix) at age 19 having never taken engineering classes.  I did finish high school and completed first two years towards my BS in physics at that time.  Tektronix saw the value in all my electronics hobby work and in my 3 months as a summer intern there.  (I turned down full-time work in order to finish college first.  Started full time work there after finishing BS in physics and MSEE.)
Perhaps you could find at least some contract engineering work there?  I don't know if there any such companies in China willing to see how bright you are in spite of little formal education.  Might have better luck after learning some analog simulation, such as the free LTSpice program.  Simulation is a valuable skill (for both hobby and work) and would allow you to submit electronic schematics to prospective employers rather than pencil sketches.

Good luck!

[NyaaX_X]

To 曹靖：I believe Audio , Power supply , or Measurement instrument companys etc. will happy to give you a job working for them . You have lots of experience in high power , higher frequency circuit & system , components using for years . Good Luck . And maybe put a few goods on aliexpress or ebay ?

給曹靖：我相信音響、電源供應器、測量儀器之類的公司會很樂意讓你去工作， 因為你數年間已經擁有高功率、較高頻率的電路或系統、以及各式元件的使用經驗和成果。 (我不確定你們那邊對於證照一類的證明常不常見對於工作有沒有幫助)，祝你好運~！另外有沒有機會把一些商品在aliexpress或ebay上架，雖然...我無法保證人氣，這方面的風險您需要了解一下。

[曹靖]

Have you scoped the GDT input signals (the two FET drains)?  Are they reasonably clean half-sine-wave signals?  Or are IRF610 FETs a bit slow for that?  What amplitude? 

The drain waveform of IRF610 appears to have a slight protrusion on the falling edge after measurement

[davekni]

The drain waveform of IRF610 appears to have a slight protrusion on the falling edge after measurement

That little blip shouldn't be any issue for gate drive.  Perhaps caused by slower rise time of 74HC14 outputs.  (74HC14 high level drive is weaker than low level drive as with most CMOS chips.  So IRF610 gate signal will rise more slowly than fall.)  So IRF610 gate may not be quite high enough to keep drain low at the start of rising edge of opposite IRF610.
Thank you for sharing the scope trace.

[曹靖]

Might have better luck after learning some analog simulation, such as the free LTSpice program.  Simulation is a valuable skill (for both hobby and work) and would allow you to submit electronic schematics to prospective employers rather than pencil sketches.

Good luck!

Thank you to David for his comfort. I will work hard to learn relevant knowledge and tools when I have the opportunity

[Wizards]

Recently im doing with a rf square wave mosfet driver and it works.hopefully it can help bring a higher efficiency to my coil

[davekni]

Recently im doing with a rf square wave mosfet driver and it works.hopefully it can help bring a higher efficiency to my coil

Will be interesting to see final coil results.  Hopefully Vgs will still be square enough at FET die after package inductance.  Square wave gate drive is likely to dissipate more power in gate drive circuitry, but likely to reduce FET power dissipation, hopefully more than the added gate driver power.

[Wizards]

Recently im doing with a rf square wave mosfet driver and it works.hopefully it can help bring a higher efficiency to my coil

Will be interesting to see final coil results.  Hopefully Vgs will still be square enough at FET die after package inductance.  Square wave gate drive is likely to dissipate more power in gate drive circuitry, but likely to reduce FET power dissipation, hopefully more than the added gate driver power.

its a 0.9nf sic fet load,consuming around 20watts.not sure about the real waveform of the die.maybe i need to use some a SMD part with kelvin source pin.

[davekni]

its a 0.9nf sic fet load,consuming around 20watts.

Sounds reasonable.

not sure about the real waveform of the die.  maybe i need to use some a SMD part with kelvin source pin.

SMD could be great electrically, but difficult for power dissipation.  A Kelvin 4-lead TO247 style package may be reasonable.  The two source leads are adjacent, so still have some mutual inductance.  Keep leads very short.  I usually mount such TO247 style devices parallel to the ECB at an edge, with leads soldering surface-mount style and ECB extending all the way to package epoxy encapsulation.  Device can still mount directly to heat sink, unlike typical SMD mounting.  Lead length is very short, not much more than the lead length within epoxy package.

[Wizards]

Quite worry about that the parasitic inductance of the 247 parts.in case of square wave driver,the inductance acts notably.and heat dissipation is also a problem

[davekni]

Quite worry about that the parasitic inductance of the 247 parts.in case of square wave driver,the inductance acts notably.and heat dissipation is also a problem

What better packages have you found?  Are high voltage SiC FETs available in low-inductance packages?

[Wizards]

Quite worry about that the parasitic inductance of the 247 parts.in case of square wave driver,the inductance acts notably.and heat dissipation is also a problem

What better packages have you found?  Are high voltage SiC FETs available in low-inductance packages?

i think SiC in Toll is a good choice,but it is hard to buy.Seems that SiC FETs are rarely used in SMPS.