Author Topic: QCWDRSSTC - Project Build  (Read 5114 times)

Offline davekni

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Re: QCWDRSSTC - Project Build
« Reply #40 on: October 25, 2024, 05:17:02 AM »
Quote
Is freewheeling generally considered better or more safe for the bridge instead of disabling the drive signal during an overcurrent event like previous UD versions?
Improves performance (usually), increases average power draw from line, and increases power dissipation in IGBTs (longer time at max current) and especially of anti-parallel diodes within IGBT package.  Not safer for bridge.

Quote
I'd like to know if the 4.7uH inductor will provide sufficient lead at my target Fres of around 400kHz. I assume LTspice can help me figure that out?
LTSpice can do a good job of predicting how much phase lead you will get.  Harder to determine how much is needed as accurate IGBT models are hard to find (and often have difficulty simulating in my experience).

Quote
Would a shielded inductor be ideal?
Yes from an interference viewpoint, presuming other parameters are appropriate.  The Yageo shield part is a typo in parameters and data sheet.  Appears to be actually 4.7nH, not 4.7uH.  Wurth part (unshielded) should be fine.  Small enough that it likely picks up little stray field from TC primary etc.
David Knierim

Offline ZakW

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Re: QCWDRSSTC - Project Build
« Reply #41 on: October 25, 2024, 05:53:02 AM »
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If I were designing a new project, that has a nice input stage.  Avoids a second CT for OCD. 
I might have misunderstood what you meant here. Were you suggesting I copy the input stage/phase lead from the freewheeling design and splice that into my current design (UD1.3/2.7) or were you suggesting I copy the entire freewheeling driver altogether?

I do like that the input is simplified and updated, I am just not entirely sure about the freewheeling portion at this point.

Quote
Improves performance (usually), increases average power draw from line, and increases power dissipation in IGBTs (longer time at max current) and especially of anti-parallel diodes within IGBT package.  Not safer for bridge.
That makes sense, I think I will stick with the traditional UD1.3/2.7 OCD then.

Regarding the input stage of the freewheeling driver, I was not sure how to adapt that to the 2.7 since it uses a different comparator and I have very limited understanding them as well as the subsequent flip flop logic. I will have to look more at the datasheet of the TL3116 versus the TLV3501 to figure that out.

Quote
LTSpice can do a good job of predicting how much phase lead you will get.  Harder to determine how much is needed as accurate IGBT models are hard to find (and often have difficulty simulating in my experience).
Quote
Yes from an interference viewpoint, presuming other parameters are appropriate.  The Yageo shield part is a typo in parameters and data sheet.  Appears to be actually 4.7nH, not 4.7uH.  Wurth part (unshielded) should be fine.  Small enough that it likely picks up little stray field from TC primary etc.
Thanks for taking a look at the parts. I did not notice the error in the reported value.

I am going to try to find an inductor series that comes in the same package but buy a few different ones just incase I need more or less. I saw your recommendation about adding a resistor in parallel to reduce the lead if the minimum was not enough.


As always, thanks for the advice Dave!

Offline davekni

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Re: QCWDRSSTC - Project Build
« Reply #42 on: October 25, 2024, 06:26:52 AM »
Quote
Regarding the input stage of the freewheeling driver, I was not sure how to adapt that to the 2.7 since it uses a different comparator and I have very limited understanding them as well as the subsequent flip flop logic. I will have to look more at the datasheet of the TL3116 versus the TLV3501 to figure that out.
Several options on how much to copy.  Minimal change is to copy just the phase lead part:

Connect output of that to R27/C5 (100k/100nF) of UD2.7.

The comparitor part of the freewheeling schematic is self-oscillating, a feature I'm fond of.  It is not necessary.  I also like rail-to-rail input and output comparitors like TLV3501.  However, TL3116 will work fine with the self-oscillating schematic.  To match lower output voltage of TL3116, change R6 from 1k to 470 ohms to center voltage divider closer to half of TL3116 high level output voltage.  This will add self-oscillation without freewheeling.  (Freewheeling is a function of logic after comparitors.)

One more option is to also use OCD input of this freewheeling schematic without freewheeling.  Still avoids an extra CT for OCD.  Keeps same OCD functionality as UD2.7.

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Offline ZakW

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Re: QCWDRSSTC - Project Build
« Reply #43 on: November 02, 2024, 10:05:29 PM »
Hello Dave,

Thank you for breaking that down for me.

Does this look about right? Sorry, about the reference designators being all changed again, I don't like having C36 next to C2.

At this point I am not sure what to call this UD. It was based off the 1.3, I added stuff from the 2.7 and the freewheeling driver, and modded the output section to use IXD driver ICs. Any suggestions?

I wanted to keep the UVLO from the freewheeling schematic since it sounded like it worked well and I excluded it from the previous version. That shouldn't be a problem, right?

Since I no longer need the 9V output, I am considering removing it; however, I am concerned that the 5V regulator may generate excessive heat when reducing 24V to 5V. After reviewing the datasheets of the ICs drawing 5V, their current consumption appears to be quite low. I tested the heat generated with a 100Ω resistor simulating a 50mA load at 24V, and it seems manageable.

« Last Edit: November 02, 2024, 10:09:25 PM by ZakW »

Offline davekni

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Re: QCWDRSSTC - Project Build
« Reply #44 on: November 02, 2024, 11:03:44 PM »
Quote
Does this look about right?
Input circuitry looks fine.  Still two logic outputs connected together.
BTW, any reason for R8 value of 5k rather than UD2.7's 1k?

Quote
I wanted to keep the UVLO from the freewheeling schematic since it sounded like it worked well and I excluded it from the previous version. That shouldn't be a problem, right?
Looks good to me.

Quote
Since I no longer need the 9V output, I am considering removing it; however, I am concerned that the 5V regulator may generate excessive heat when reducing 24V to 5V. After reviewing the datasheets of the ICs drawing 5V, their current consumption appears to be quite low. I tested the heat generated with a 100Ω resistor simulating a 50mA load at 24V, and it seems manageable.
Sounds good.
David Knierim

Offline ZakW

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Re: QCWDRSSTC - Project Build
« Reply #45 on: November 03, 2024, 12:22:24 AM »
Thank you for taking a look!

Quote
Still two logic outputs connected together.
Dang, I thought I corrected the error, I will check again.

Edit: Found it, not sure how the pin out flipped. Thanks for spotting that, I never would have.

Quote
BTW, any reason for R8 value of 5k rather than UD2.7's 1k?
This was your advice to make self-oscillation more stable. As a result of increasing R8 you also suggested changing C33 (C8 in mine) from 220pF to 1nF. I liked the relevant posts below.

https://highvoltageforum.net/index.php?topic=2651.msg20276#msg20276
Quote
Thank you.  Makes discussion much clearer.  BTW, self oscillation may work better if R6 is increased from 1k to ~5k as mentioned near the end of this post:
    https://highvoltageforum.net/index.php?topic=1914.msg14854#msg14854
Above post recommends changing R2, the label from common UD2.7 schematics.  This is R6 for your schematic.  Increasing R6 value should help make self-oscillation frequency more stable and easier to adjust.

https://highvoltageforum.net/index.php?topic=2651.msg20288#msg20288
Quote
Just looked back at your updated schematic from a few posts ago.  C15 will need to be larger than 220pF, ~1nF, to go along with 5K for R6.  I'd recommend changing C15 rather than going so low for R6 value.

Quote
Sounds good.
Excellent, then I will remove the 9V regulator and clear up some board space.
« Last Edit: November 03, 2024, 12:28:46 AM by ZakW »

Offline davekni

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Re: QCWDRSSTC - Project Build
« Reply #46 on: November 03, 2024, 02:59:46 AM »
Quote
This was your advice to make self-oscillation more stable. As a result of increasing R8 you also suggested changing C33 (C8 in mine) from 220pF to 1nF. I liked the relevant posts below.

https://highvoltageforum.net/index.php?topic=2651.msg20276#msg20276
Thank you for the prompt to look back at my post and more at the version you have here.  That post was for a self-oscillation modification for existing UD2.7 boards designed to minimize required changes/patches.  That does fit best with what you have here including 5k value for your R8.  So keep that value.

Another option is to tweak this schematic to use TL3116 and your existing input phase-lead and OCD circuitry:
    https://highvoltageforum.net/index.php?topic=1336.msg9894#msg9894
Change R3 to 470 ohms to match reduced output swing of TL3116.  Add a variable resistor in series with R1 for adjustment.  Replace L4 and R5 with existing phase lead circuitry (with your L1, C18, R7, R11, and RV1).  This version uses fewer components and avoids having two 1k/470 resistor dividers that need to match well.
David Knierim

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Re: QCWDRSSTC - Project Build
« Reply #46 on: November 03, 2024, 02:59:46 AM »

 


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