SSTC with push-pull configuration

[Bambinz]

Hi all,
I had a good experience with a small SSTC based on tefatronix's schematic (push-pull configuration driverless) where I obtain 7-8cm of spark with a 24V supply, now I would like to try to build a little bit bigger teslacoil to obtain spark near 20cm

The main idea is to use a 440VA 53VAC trasformer that I have in laboratory. I would like to explore an alternative configuration respect the usual half/full brige.
What do you think about a push-pull configuration with the mosfet drived by a couple of UCC37322/37321? In this way it is not necessary a GDT and than the feedback will be taken from secondary with a small transformer plus two schmitt inverter. In addition the push-pull configuration, like the full bridge "double" the voltage.
The other advantage is that theoreticaly it is not necessary to bias the mosfet because the system will start "automatically".

The coil will have a very low primary inductance to have an high peak current combinate to a low duty-cycle to have a ​low mean power and an high pulse power. 

[Bambinz]

Some suggestion? 

[davekni]

Efficiency will be lower due to FET avalanche breakdown every cycle.  Study this thread for issues and optimization of a push-pull system:
https://highvoltageforum.net/index.php?topic=1823.msg13766#msg13766
It is for ferrite transformer drive, but the issues and mitigation are identical.

[Magneticitist]

Your mileage will most certainly vary but I tried the push pull setup using the gate drivers a while back using a GDT. The GDT isn't necessary unless you get too high in input voltage but I recall about the same performance as going direct feedback at the time. I remember thinking I had took a bunch of effort to make the thing run off logic feedback and I didn't have entirely ideal components but I tried to observe the difference using what I had when driven with the direct feedback and the gate drivers and hex inverter combo. It had its advantages for example running really low bus voltages like 5v or less if desired but it didn't seem worth all the extra components. Maybe I could have designed it a little better. I ultimately just substituted some knockoff IRFP250N's in the circuit and used the dual-choke setup to feed a single primary with a series capacitor across it. Trying to tune the switching a little with some drain caps and getting the series primary cap value just right (or primary and coupling) and it seems to run pretty well up to a tested 60VDC for me. This of course still requires a separate interrupter and gate voltage which I use a little battery pack for.
Alternatively I've tested the basic circuit as-is with higher voltage fets like 460s up to about 100VDC input before it seemed to start struggling (RC snubbers will FLAME)

That circuit to me has only truly been handy for the low voltage arrangements. I think it's perfect actually. If tuned right you can run it quite efficiently getting any range of output with 55V fets. Every time I tried to rework it into something that ran 120VAC it was a disaster.

[Bambinz]

Thank you very much for the tip!
Probably will be better to use an half-bridge with a voltage doubler to keep it simple!
In addition in the push-pull setup is more difficult to keep low parassitic inductance, that results in higher voltage spike. 

I will make some test and i will report the results

[davekni]

Probably will be better to use an half-bridge with a voltage doubler to keep it simple!
In addition in the push-pull setup is more difficult to keep low parassitic inductance, that results in higher voltage spike.

Yes, half-bridge is easier.  No issue with parasitic inductance between halves of a center-tapped primary since primary is now a single coil.  It is still good to minimize parasitic inductance within electronics for half-bridges.  Consider this simple interconnect option:
https://highvoltageforum.net/index.php?topic=1324.msg9795#msg9795

[Bambinz]

Thank you very much!

Yes, of course it is necessary to minimze the parassitic inductance between the mosfet and the DC-Link Cap maybe by adding an MKP capacitor directly connected on the mosfet

[Mads Barnkob]

Thank you very much!

Yes, of course it is necessary to minimze the parassitic inductance between the mosfet and the DC-Link Cap maybe by adding an MKP capacitor directly connected on the mosfet

A MKP capacitor, or snubber capacitor, will only take care of the switching spikes/transients induced from the parasitic inductance. Current draw is shared according to capacitive ratio sharing between the capacitors, so adding a MKP capacitor of 1uF vs. 1000uF, will only move 0.1% of the current draw to the MKP capacitor.

Dont try to patch the symptoms, fix the problem