sstc bad gdt signal

[balazs]

Hi everyone!
I buildt this tesla coil:https://kaizerpowerelectronics.dk/tesla-coils/kaizer-sstc-i/
The GDT signal isn't good, why is it? I shaded the driver.

[davekni]

The GDT signal isn't good, why is it?

I've been puzzling over this for a while.  Looks like what a DRSSTC gate signal is when phase lead is insufficient.  Haven't yet thought of a cause for this SSTC.
Some more information may help solve the puzzle.
Can you scope FET drain voltage?  If you have two scope channels, seeing both gate and drain on a single image would be great.  If not, measure each separately.  It would help to expand the scope time base, to 500ns/division or at least 1us/division, so the gate glitch is easier to see.  Expanding vertically would help too, 5V/division.
Can you post more pictures of the half-bridge (FETs) with their wiring to C7, C8, and C9 (330uF and 0.68uF capacitors)?  Parasitic wiring inductance in power bus can cause problems.  An over-voltage spike on Vbus may be causing avalanche current in the upper FET, resulting in a voltage spike on the lower FET, coupling to its gate by Cgs.
From what I can see, gate wiring looks good, with twisted wire leads for the GDT and twisted windings withing GDT.  Can't quite see the final GDT gate/source connections to FETS in existing images.  It is ideal to keep wires paired (including gate resistor) all the way to FET pins, and away from FET power connections (ie. GDT leads and resistor folded up over FET body presuming power connections extend below the FETs).

[balazs]

Hi, thanks for teh reply!
I measure the tesla coil, and i found the proble. The 5v reguletor was contact fault. I exchange the regulator, and the coil was working fine.