Am I Misunderstanding of DC Blocking Capacitors

[werd]

I think I'm a little bit confused here... are the two .68uF caps in this photo considered DC Blocking Capacitors, or is there a separate category for half-bridge voltage splitter capacitors (meaning that this photo only has a smoothing cap and then two voltage splitter caps but no DC blocking cap)? And if these aren't called DC Blocking Capacitors, I have yet to figure out what goes towards deciding their capacitance. Does the capacitance not necessarily even matter because all we really care about is the voltage they create across the primary?

https://www.stevehv.4hv.org/SSTC5/miniSSTCsch.JPG

I've been spamming this forum lately, so thank you to everyone who has been kindly helping me out!

[klugesmith]

If the DC bus spanned by C12 (420 uF) were ideal,
then C7 and C8 would not need to match each other, and could both connect to the negative rail or both to the positive rail.  All that matters is that their sum is 1.36 uF.   In practice, as drawn, they also provide 0.34 uF of high-frequency-capable capacitance in parallel with C12.

The DC voltage on node they share with L1 is near the middle of primary DC bus voltage, but that has nothing to do with the C7:C8 capacitance ratio.  The voltage will match the DC level at the other end of L1, which is determined by relative on-time of Q1 and Q2.

You could call C7 and C8 DC-blocking capacitors, if they are not designed to resonate with L1.  That question is best answered by a Tesla coiler.

[T3sl4co1l]

Yes.  The symmetry is useful: the MOSFET half-bridge on the left, the C divider on the right.  When power is applied but before switching starts up, the midpoint is halfway between the supplies -- C divider works just like an R (or any other impedance) divider.  When switching starts up, it generates a 50% square wave, which has an average of *gestures calculatoringly* halfway between the supplies -- point is, minimal startup transient is applied to the primary, because both sides are balanced.

Whereas if it were unbalanced, just a 1.36uF to + or -, the instant it starts switching, a transient is guaranteed, where one transistor or the other carries a big gulp of current (and probably the other transistor is hard-switching into that current too) and eventually things settle down to steady state.

The film caps also serve as local bypass for the MOSFETs, assuming they're placed adjacent.  When any one transistor turns off, the voltage across it shoots up (pulled by the resistive-to-inductive load current it was carrying), and that overshoot stops when the load current transfers to another device (namely the opposing transistor, or D1/D2 but they're superfluous as the MOSFETs have much beefier body diodes in them already).  Which means that loop has to be closed, and C7/C8 do just that.

And yeah, the value is small enough that it's probably resonant.  Which is fine, it can be both.  If resonant, that does at least mean the startup transient is short, and not much amplitude -- essentially, the point is to generate essentially that transient response, every half cycle, and to have them build on each other as they overlap over time.  In that case, it's not so important that one side or the other gets the first hit (or even that one is accidentally double the magnitude, i.e. the cap charges to one side but the opposing transistor turns on first), but still, the bypassing effect of both across the supply is helpful.

Tim

[Zipdox]

They make up a capacitive divider for the half bridge. But because a capacitive divider can only conduct AC, that also makes them DC-blocking capacitors.

[klugesmith]

T3sl4co1l explained the DC voltage division by C7 & C8, during the transient when DC bus is powered up.   ( Perhaps useful if DC bus voltage risetime is not very slow compared to the C7 & C8 time constants. )

Don't like to call them a capacitive divider for AC.  What AC voltage is divided or split?

[T3sl4co1l]

Even if the DC bus rises slowly, it's still not "DC".

More practically speaking: "AC" is any rate that's faster than the capacitors' natural discharge rate in this circuit.  Which is quite slow (seconds+) so it tends to sit at the midpoint until used.

Tim

[klugesmith]

Good point, Tim, the time constant of C7 and C8 is from nothing but their own leakage.