FPGA speeds these days?

[klugesmith]

Been a while since I was close to any FPGAs that aren't flagships of latest generation, with four-digit pincounts and price tags, distinguished by how many dozens of 10+ Gbps SERDES they have.

Among FPGA's that are small and inexpensive today,
are there grades fast enough that 125 MHz core clock and 125 Mbps IO would be unremarkable?
With at least about 80 general purpose IO pins?

Sorry to start by asking on a forum, but here we are.  Thank you!

[davekni]

For the past decade or so at work I've been using Xilinx Spartan6 family, mostly XC6SLX25-3FTG256.  Most of the design is running at 133MHz, with some DDR I/O at 266Mbps.  Have implemented a few small sections at 266MHz internal logic.  There are smaller versions of this family too.  I've used XC6SLX9 before, but we needed more internal memory, so migrated to XC6SLX25.  (XC6SLX16 has more logic than the 9, but no more memory.)  We also use XC6SLX45T which has one SERDES.  Design tools for these smaller parts are free (Xilinx Webpack).

All my home FPGA projects such as MIDI interrupter are based on old boards from work, patching IO to test points etc.

[Weston]

I use an spartan-7 FPGA for my tesla coil controller. the part I use is $30 in quantity one. In volume I bet its sub $5. I would recommend the 7 series parts over the 6 series parts because the new software, vivado, only supports the 7 series parts.

My controller, which includes the DSP multiplier blocks runs at 240MHz. I used to run it at 320Mhz but place and route would take longer. It can also run a RISC-V softcore at 240MHz.

I have also interfaced the part with some ADCs with a serial output, running the LVDS DDR inputs to 720Mbps.

I am not that familiar with the cheap iCE40 FPGAs with the open source toolchain can do, but I suspect they can. They dont have that much IO though.  I suspect that 80 IO is going to put you at a BGA part.

[TMaxElectronics]

Lattice has the MachXO2 parts that come in packages anywhere from 32pin to 144pin tqfp with the 144pin ones having up to 6864 LUTs and 114 IO. I haven't actually used them yet though so I can't comment on the speed but 125MHz sound easily achievable. The MachXO3 parts get a little wonky when over 250MHz, but I did have some counters run at >300MHz no problem (though that might be out of spec).

I use the machxo3 for a LED panel driver that gets 128x128x3px (rgb) at 10 bits scanned at around 150Hz (~75Mbit/s) but that is with 6 data lines and limited in clock speed by the matrix row driver ICs. So obviously not really representative of serdes performance.

I have also played around with some artix-7 parts, that can run block-ram at >350MHz and have an even higher logic clock, but they only come in some terrible BGA packages if I remember correctly (and are also quite expensive).

All my home FPGA projects such as MIDI interrupter

Very interesting I build a hardware FM-synthesizer with a structure similar to the FM8 software, that ran on the artix-7 chip, and added an interrupter output to that as well. Though I never managed to get pitch bend implemented in hardware, because of the pow function. Did you use a softcore for that?

[SteveN87]

Altera (now Intel  ) Cylone 10 LP dev board with VectorBlox "Orca" RISC-V CPU configured with 32-bit/4-stage pipeline/hardware mul & div ran happily at 100MHz (with onchip memory). Would probably go faster, but I tend to offload fast stuff onto custom peripherals and keep the CPU clock rate down.

BTW the open-source toolchain (SymbiFlow) now supports all Xilinx 7-series and Lattice ECP5 (not tried these but they look quite capable).

[klugesmith]

Thanks for the hints.   I came to realize that my 80 IO requirement can be eased by splitting design into more than one FPGA, if that moves us into packages easier to deal with.  The Lattice hint led me to, for example, a 100 pin TQFP.

Was looking into FPGA for an idea to whip up an equivalent time sampler with input bandwidth substantially above 10 GHz.  As found commercially in, say, Picoscope 9300.  And plug-ins for Tektronix green-screen scopes from the 1970's.  Except I don't need to get the voltage of each sample, just a 1 or 0, in other words a sampling voltage comparator.  That by tweaking strobe time and threshold voltage, could usefully measure details of a repetitive input pulse narrower than 100 ps.

Want to use commercial off-the-shelf parts, without the concentrated mixture of unobtainium and finesse built into the front ends of those 25 GHz scope channels (or so they would have us believe). Got inspired by a differential DFF component called NBSG53A (SG stands for silicon-germanium), but it turns out that's a long obsolete part!   The eval board has some microstrip features shaped like pie slices. Does anyone know if those are some kind of really high speed filter, as for Vcc decoupling?


Another thing that might be worth looking in to: Data eye monitor tools that FPGA vendors provide, to support debug and tuning of the SERDES links. Especially for cases where a lane receiver can use sample clock that wasn't recovered from data stream in same lane.

[SteveN87]

Those pie slice things are quarter wave stubs - the shape gives them a wider bandwidth.