13.56MHz ISM frequency HFSSTC (or perhaps HFDRSSTC)

[曹靖]

Using your existing parts for my ZVS drive topology will be difficult.  IRF610 needs higher gate voltage, and has significant internal gate resistance.  74HC14 is rather slow for 12MHz and output current is low for driving IRF610 gate even with 5 paralleled.
Your SiC FET has slightly higher internal gate resistance besides ~2x gate capacitance, 1.7 ohms typical vs. 1.4 ohms typical for the lower-current part I'm using.  That will consume some gate drive power, ~2W at 20Vpp.  (In my version, SiC FET gets a bit warm with just gate drive applied, at 30Vpp and 13.56MHz for mine.  Likely around 2W for me too.  I picked that SiC FET partly because of it's fast gate time constant, low R and low C.)

If you want to work with your existing parts, I'd suggest a few changes:
74HC14 is specified to 6V.  Will typically work at 7V.  7V would provide more reasonable Vgs for IRF610 parts.
Use two more inverters from oscillator output to feed second 5x parallel gate drive stage.  That will reduce delay skew between the two IRF610 gate signals.  Perhaps even add a small R/C delay on input to the single inverter (R between oscillator output and inverter input) to match delay with the two-inverters.

Good luck!

Thank you to David for providing the method. Before you replied to my message, I had already redesigned a new circuit using ECB. The new circuit uses a 24MHz crystal oscillator and a D trigger to form a binary frequency division, resulting in 12MHz. Since the D trigger happens to have two opposite outputs, the delay of the two signals has been reduced compared to the old circuit. Today, I saw your message and adopted your suggestion to provide a voltage of 6.5-7V for the 74 series IC. The effect is very significant. I have received the connection Near ideal gate voltage~

[davekni]

Since the D trigger happens to have two opposite outputs, the delay of the two signals has been reduced compared to the old circuit.

Yes, that is exactly why I used a DFF.

You are amazingly fast building new versions!  Any time left for the rest of life?

I have received the connection Near ideal gate voltage~

Have you scoped the GDT input signals (the two FET drains)?  Are they reasonably clean half-sine-wave signals?  Or are IRF610 FETs a bit slow for that?  What amplitude?  Perhaps none of this matters if you are happy with the result.  If you want a little higher amplitude on SiC FET Vgs, that may be possible by adding a little more capacitance across GDT input (between IRF610 drains) and making GDT lead wire a bit shorter to keep in tune.  This presumes IRF610 drain waveforms are reasonable now.

BTW, I also responded to your other thread on possible changes to your older gate driver that may help with tuning and efficiency.

Hope all goes well!

[davekni]

In a few years, I will be thirty years old. There is an ancient Chinese saying that goes, 'I have five out of ten and am determined to learn, and at thirty, I stand tall.' It means that when a person reaches the age of 30, he must be able to stand on his own feet. But I haven't done anything yet. I dropped out of school very early. Maybe at the age of 16, he could only do some lowly jobs because of his low education. His income was very meager, so he didn't starve to death. But fortunately, I still have a hobby like making Tesla coil. Although this love has not helped me to earn money, it also adds a little bitterness to my hard life

At least here in US, sometimes there are a few companies that will recognize talent like yours and hire engineers in spite of not having formal engineering education.  I was offered my first first full-time engineering job (at Tektronix) at age 19 having never taken engineering classes.  I did finish high school and completed first two years towards my BS in physics at that time.  Tektronix saw the value in all my electronics hobby work and in my 3 months as a summer intern there.  (I turned down full-time work in order to finish college first.  Started full time work there after finishing BS in physics and MSEE.)
Perhaps you could find at least some contract engineering work there?  I don't know if there any such companies in China willing to see how bright you are in spite of little formal education.  Might have better luck after learning some analog simulation, such as the free LTSpice program.  Simulation is a valuable skill (for both hobby and work) and would allow you to submit electronic schematics to prospective employers rather than pencil sketches.

Good luck!

[NyaaX_X]

To 曹靖：I believe Audio , Power supply , or Measurement instrument companys etc. will happy to give you a job working for them . You have lots of experience in high power , higher frequency circuit & system , components using for years . Good Luck . And maybe put a few goods on aliexpress or ebay ?

給曹靖：我相信音響、電源供應器、測量儀器之類的公司會很樂意讓你去工作， 因為你數年間已經擁有高功率、較高頻率的電路或系統、以及各式元件的使用經驗和成果。 (我不確定你們那邊對於證照一類的證明常不常見對於工作有沒有幫助)，祝你好運~！另外有沒有機會把一些商品在aliexpress或ebay上架，雖然...我無法保證人氣，這方面的風險您需要了解一下。

[曹靖]

Have you scoped the GDT input signals (the two FET drains)?  Are they reasonably clean half-sine-wave signals?  Or are IRF610 FETs a bit slow for that?  What amplitude? 

The drain waveform of IRF610 appears to have a slight protrusion on the falling edge after measurement

[davekni]

The drain waveform of IRF610 appears to have a slight protrusion on the falling edge after measurement

That little blip shouldn't be any issue for gate drive.  Perhaps caused by slower rise time of 74HC14 outputs.  (74HC14 high level drive is weaker than low level drive as with most CMOS chips.  So IRF610 gate signal will rise more slowly than fall.)  So IRF610 gate may not be quite high enough to keep drain low at the start of rising edge of opposite IRF610.
Thank you for sharing the scope trace.

[曹靖]

Might have better luck after learning some analog simulation, such as the free LTSpice program.  Simulation is a valuable skill (for both hobby and work) and would allow you to submit electronic schematics to prospective employers rather than pencil sketches.

Good luck!

Thank you to David for his comfort. I will work hard to learn relevant knowledge and tools when I have the opportunity

[Perolodzilla]

Recently im doing with a rf square wave mosfet driver and it works.hopefully it can help bring a higher efficiency to my coil

[davekni]

Recently im doing with a rf square wave mosfet driver and it works.hopefully it can help bring a higher efficiency to my coil

Will be interesting to see final coil results.  Hopefully Vgs will still be square enough at FET die after package inductance.  Square wave gate drive is likely to dissipate more power in gate drive circuitry, but likely to reduce FET power dissipation, hopefully more than the added gate driver power.

[Perolodzilla]

Recently im doing with a rf square wave mosfet driver and it works.hopefully it can help bring a higher efficiency to my coil

Will be interesting to see final coil results.  Hopefully Vgs will still be square enough at FET die after package inductance.  Square wave gate drive is likely to dissipate more power in gate drive circuitry, but likely to reduce FET power dissipation, hopefully more than the added gate driver power.

its a 0.9nf sic fet load,consuming around 20watts.not sure about the real waveform of the die.maybe i need to use some a SMD part with kelvin source pin.

[davekni]

its a 0.9nf sic fet load,consuming around 20watts.

Sounds reasonable.

not sure about the real waveform of the die.  maybe i need to use some a SMD part with kelvin source pin.

SMD could be great electrically, but difficult for power dissipation.  A Kelvin 4-lead TO247 style package may be reasonable.  The two source leads are adjacent, so still have some mutual inductance.  Keep leads very short.  I usually mount such TO247 style devices parallel to the ECB at an edge, with leads soldering surface-mount style and ECB extending all the way to package epoxy encapsulation.  Device can still mount directly to heat sink, unlike typical SMD mounting.  Lead length is very short, not much more than the lead length within epoxy package.

[Perolodzilla]

Quite worry about that the parasitic inductance of the 247 parts.in case of square wave driver,the inductance acts notably.and heat dissipation is also a problem

[davekni]

Quite worry about that the parasitic inductance of the 247 parts.in case of square wave driver,the inductance acts notably.and heat dissipation is also a problem

What better packages have you found?  Are high voltage SiC FETs available in low-inductance packages?

[Perolodzilla]

Quite worry about that the parasitic inductance of the 247 parts.in case of square wave driver,the inductance acts notably.and heat dissipation is also a problem

What better packages have you found?  Are high voltage SiC FETs available in low-inductance packages?

i think SiC in Toll is a good choice,but it is hard to buy.Seems that SiC FETs are rarely used in SMPS.