High Voltage Forum

Tesla coils => Dual Resonant Solid State Tesla coils (DRSSTC) => Topic started by: Benjamin Lockhart on September 10, 2023, 10:25:28 PM

Title: Benjamin's DRSSTC 2 in progress
Post by: Benjamin Lockhart on September 10, 2023, 10:25:28 PM
Hey guys,
I'm really excited I just got my big DRSSTC oscillating under feedback


It uses a Phillip Slawinski UD+
0.365 uF MMC
8 inch secondary coil
about 50kHz secondary fres
CM300 fullbridge

I am  trying to set the phase lead in the driver now. I can just make out some spikes on the igbt collector-emitter signal but barely.
This is one low side IGBT, and the primary current. The bus voltage is about 120V dc, the primary current rings up to around 225A. 150us on time.
And yes this is a different scope than in the picture above.

With a slight dummy load sitting on the coil.


without the dummy load the first spike goes down a bit.


zoomed in, the spikes pretty much disappear, also some wrong triggering I couldn't get rid of.


Two different phase lead settings with the dummy load.



What do you think about these waveforms?
Thanks, Benjamin
Title: Re: Benjamin's DRSSTC 2 in progress
Post by: davekni on September 11, 2023, 01:14:49 AM
Quote
I'm having a bit of trouble getting my analog scope to trigger cleanly to set the phase lead in the driver. I can just make out some spikes on the igbt collector-emitter signal but barely.
First simple step is to set trigger holdoff long enough to avoid multiple triggers within one enable pulse (one burst of oscillation).
Second, I'd try triggering on the current feedback signal (signal across 51 ohm burden resistor presuming input looks like UD2.7).  Or if you have a another CT output for scoping, use that.  Then hopefully you can trigger reliably on the first cycle that exceeds whatever current threshold you set.
Third, if your analog scope is fancy enough, use delayed trigger mode.  Set main trigger mode for current, with delay mode to enable trigger on H-bridge output.  That should clean up much of the jitter remaining with a simple current trigger.  (Or set both main and delayed trigger to H-bridge output, using delay to wait for current to build to desired level for checking phase lead.)

Good luck with your build!

Edit:  Saw above edit after posting.  Spikes near the beginning of a burst are normal, at least for UD2.7.  Phase lead does not work properly until current builds some.  Not as important early either since switching current is low.

Final scope capture definitely looks cleanest.

Are you using chop or alternate mode?  The disappearing spikes look more like an artifact of alternate mode, with trigger capturing first part of a burst when scoping current and a later part when scoping H-bridge output.  I'd suggest using chop mode.  Sufficient trigger hold-off should also fix that issue.
Title: Re: Benjamin's DRSSTC 2 in progress
Post by: Benjamin Lockhart on September 11, 2023, 04:46:35 AM
Thanks, triggering from the primary current CT with DC coupling, and playing with holdoff helped a lot.
Alt vs chop didn't seem to matter very much.
Also fine tuning the startup oscillator got rid of the first spike completely! it's only set for one cycle right now and that seems to work fine.

Unfortunately I can only run the bridge up to 130V DC with isolation so I can scope it. I have 45V step down transformer.

Any tips before I set up for first light testing?

Thanks, Benjamin
Title: Re: Benjamin's DRSSTC 2 in progress
Post by: davekni on September 11, 2023, 05:28:09 AM
Quote
Alt vs chop didn't seem to matter very much.
In most cases alt vs chop does not matter, especially with holdoff set correctly to get one trigger per burst.  However, occasionally alternate can produce seemingly-impossible captures, as in the earlier capture labeled:
"zoomed in, the spikes pretty much disappear, also some wrong triggering I couldn't get rid of."
Even ignoring the jitter, that capture appears to show current continuing to increase each cycle while H-bridge output has stopped.  That is not a real situation.  Capture of current was by chance occurring first while still increasing, followed by capture of H-bridge output voltage later as it ended.
For that reason I almost always avoided alt mode.  Used it only occasionally, when signal being scoped was close to chop frequency, which caused artifacts.  Even then I'd switch back and forth to make sure I wasn't getting a false display due to alternate mode.

Quote
Any tips before I set up for first light testing?
Key advice is test at low duty cycle.  Minimizes chances of hard failures if you find issues.

If your H-bridge Vbus supply is a voltage doubler from line, it may be possible to scope.  Make neutral center of doubler caps.  Connect scope probe through a capacitor (0.1uF or so) to neutral or Vbus-.  Neutral should be close to ground potential, with some ripple due to line power wire IR drop.  Capacitor provides high-frequency coupling to scope ground.  H-bridge outputs should be reasonable to view in spite of that bit of ripple.
Title: Re: Benjamin's DRSSTC 2 in progress
Post by: Benjamin Lockhart on September 11, 2023, 06:02:59 AM
Interesting, the supply is a doubler. I don't have a 100:1 probe though. I'm not sure if I can run it off 120V AC and use a 10:1 probe on the bridge.
Title: Re: Benjamin's DRSSTC 2 in progress
Post by: Mads Barnkob on September 11, 2023, 12:17:34 PM
Quote
Any tips before I set up for first light testing?
Key advice is test at low duty cycle.  Minimizes chances of hard failures if you find issues.

Keep DCbus above 100 VDC to avoid excessive transient ratio from IGBT output capacitance. Low voltage testing like 50VDC can fool you to think there is very large switching spikes, as the spike from the output capacitance is the same at 50VDCbus as 500VDCbus, it will look 10 times worse at the low voltage.

Keep BPS at 100BPS'ish and duty cycle low. If you also use low BPS, you can get weird intermittent errors, where the driver is not getting enough feedback.
Title: Re: Benjamin's DRSSTC 2 in progress
Post by: davekni on September 12, 2023, 05:46:33 AM
Quote
Interesting, the supply is a doubler. I don't have a 100:1 probe though. I'm not sure if I can run it off 120V AC and use a 10:1 probe on the bridge.
Depends on voltage rating of your 10x probe.  Many are good to 600V.  Voltage rating does decrease as frequency increases.  At low duty cycle, frequency derating of probe is less important.
Title: Re: Benjamin's DRSSTC 2 in progress
Post by: Benjamin Lockhart on September 13, 2023, 07:44:25 PM
Well I seem to have blown the driver.

The 24V input reads like there is a diode across it, and it's shorting the 24V psu.
I don't know why, perhaps a line filter going into the psu might have helped?

The only things I can think of are that I didn't use distilled water, just clean well water, in the primary cooling loop, so maybe some voltage made it's way into the 120V line through the pump, and somehow through the 24 psu and killed something in the driver?
Or maybe voltage on the ground?

All grounds are tied together, to mains ground, and a 10 foot ground rod.

It was making some small output, 8 inches or so at 140V AC input, but I think that's because I had the OCD set at around 300A. it was skipping a lot of pulses and acting kind of erratic.
It was in tune though, the scope confirmed this because the primary current was notching.

I'd appreciate any advice you have.
Title: Re: Benjamin's DRSSTC 2 in progress
Post by: Mads Barnkob on September 13, 2023, 08:06:04 PM
The only things I can think of are that I didn't use distilled water, just clean well water, in the primary cooling loop, so maybe some voltage made it's way into the 120V line through the pump, and somehow through the 24 psu and killed something in the driver?

Even tap water will not carry any real current at those hose lengths. Steve Ward wrote many years ago that even distilled water is useless and he just used tap water. After a few hours of using distilled water, it has been contaminated by surrounding, ion movement from electrolysis etc.
Title: Re: Benjamin's DRSSTC 2 in progress
Post by: Benjamin Lockhart on September 13, 2023, 10:15:20 PM
Ok, thanks. I need to do some testing on the driver to find out exactly what's wrong.
Could the grounding have something to do with it?
Title: Re: Benjamin's DRSSTC 2 in progress
Post by: davekni on September 14, 2023, 06:13:53 AM
Quote
Ok, thanks. I need to do some testing on the driver to find out exactly what's wrong.
Could the grounding have something to do with it?
Any chance the PSU got confused and generated more than 24V?  Yes, will help to see what's wrong with driver.

AstRii just posted about his experience with FPGA resetting during ground strike rail hits when driver is grounded:
    https://highvoltageforum.net/index.php?topic=2585.msg19148#msg19148
However, I always ground everything and haven't had such an issue.

Is your driver grounded well to it's shield box?  Looks like so in your picture.

Other than PSU over-voltage, only other thought that comes to mind is driver FPGA getting confused and generating high frequency output that overheated output FETs or driver chips due to rapid switching.
Title: Re: Benjamin's DRSSTC 2 in progress
Post by: Benjamin Lockhart on March 15, 2024, 08:56:58 PM
I've got an update on this build. I'm rebuilding it completely except for the primary and secondary. I've reduced the box from 20 inches to 16 inches square and I'm doubling the bus capacitance to 9900uF.

I got the UD+ fixed, it was just one dead output FET. I'm still not quite sure why it died but I'll keep an eye on temps.

I decided to use a double full bridge after seeing a split MMC used on Phillip Slawinski and Cameron Prince's tesla guns to force equal current sharing.
I'm wiring it like this unless anyone can see a reason this won't work well.

Hopefully the current will be split evenly enough to run close to twice the current of a single bridge.

I'm increasing the MMC to 0.66uF total


Title: Re: Benjamin's DRSSTC 2 in progress
Post by: Benjamin Lockhart on March 19, 2024, 06:41:39 AM
The new inverter bus assembly is done!
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Title: Re: Benjamin's DRSSTC 2 in progress
Post by: Mads Barnkob on March 19, 2024, 04:31:02 PM
Beautiful work on that bridge, I love to see some nice handmade items :)

I never tried split MMC, so looking forward to hear more about your experience in that field.

I think your poor little half-bridge rectifier SKKD 100/12, is going to suffer a bit, you might need a bigger one. Surge overload current capabilities is however helped with a much lower Vrrm voltage, as you are properly at 500-600VDC?
Title: Re: Benjamin's DRSSTC 2 in progress
Post by: Benjamin Lockhart on March 19, 2024, 11:12:24 PM
Thanks Mads, I thought that a 100A rectifier would be ok for a coil running off a 50A breaker?
I have a single phase 240V supply so the bus voltage should be 680V with no load.
Title: Re: Benjamin's DRSSTC 2 in progress
Post by: flyingperson23 on March 20, 2024, 12:30:30 AM
The breaker supplies 50A RMS. Peaks will be higher, especially with a voltage doubler.
Title: Re: Benjamin's DRSSTC 2 in progress
Post by: Mads Barnkob on March 20, 2024, 10:39:47 AM
Thanks Mads, I thought that a 100A rectifier would be ok for a coil running off a 50A breaker?
I have a single phase 240V supply so the bus voltage should be 680V with no load.

There is some derating graphs in the datasheet. Here both sine wave and rectangular are mentioned, where the rectangular causes higher dissipation etc.
Title: Re: Benjamin's DRSSTC 2 in progress
Post by: Benjamin Lockhart on March 21, 2024, 02:15:31 AM
Ok, that makes sense. I have a couple huge 301UR200 stud mount diodes (330A, 2000V) that I can fit in there instead. Should be plenty!
Title: Re: Benjamin's DRSSTC 2 in progress
Post by: Benjamin Lockhart on March 21, 2024, 06:31:42 PM
I have a question.

I was planning to wire the extra gates with more GDT secondaries, but would it be better for switching time matching to parallel the gates directly for the doubled up IGBTs?

Since I've already made gate drive boards for each brick, it would be best if I could continue using them.
I suppose I could use one GDT secondary to feed two separate gate networks through the existing boards.

Thanks, Benjamin
Title: Re: Benjamin's DRSSTC 2 in progress
Post by: davekni on March 22, 2024, 02:59:25 AM
Quote
I was planning to wire the extra gates with more GDT secondaries
Yes, I think that would be best, with a caution.
Split MMC balances current at coil frequency.  High frequency (H-bridge output transition edges) are connected more directly through MMC sections that are low impedance at high frequency.  H-bridge output transition timing needs to match.  So GDT windings and lead lengths should be matched including matched coupling to primary.
Best GDT performance (lowest leakage inductance) is using a twisted pair for each gate, half of each pair to IGBT and other half to primary.  All primary windings paralleled.  Ideally each primary winding is twisted together all the way back to driver, connected in parallel only at driver connections.
    https://highvoltageforum.net/index.php?topic=1854.msg13949#msg13949
Title: Re: Benjamin's DRSSTC 2 in progress
Post by: Benjamin Lockhart on March 22, 2024, 03:57:54 AM
Thanks Dave, I'll do that
Title: Re: Benjamin's DRSSTC 2 in progress
Post by: thedoc298 on March 26, 2024, 01:50:42 AM
Very nice looking gear, I was wondering on your primary, it looks like your connected to the outer and the inner. How are you moving the tap, as I don't see any.
Title: Re: Benjamin's DRSSTC 2 in progress
Post by: Benjamin Lockhart on March 26, 2024, 04:48:22 AM
You can see the tap point here.


I've mostly finished rebuilding the coil now. Hopefully this aluminum block will be enough heatsinking for the rectifiers.








Making things fit.


I put a few extra CTs on the bridge outputs to check current sharing and it appears to be identical on 2 separate bridge outputs!




Title: Re: Benjamin's DRSSTC 2 in progress
Post by: Benjamin Lockhart on May 03, 2024, 10:59:34 PM
Hi all, Here's an update on this project.

First light was making 7 foot sparks at 100us and 240V in with minimal tuning, but a primary strike and flashover to the bottom secondary turn seems to have killed the FPGA in the UD+.

I suspect that equidrive was a bad idea and the high voltage on the inner primary turn could have caused a spike on the ground line during flashover, but I really don't know.

I've since replaced the driver with a spare for now, reconfigured the MMC for higher primary impedance (now 0.296uF instead of 0.67uF) and no equidrive.
I simply paralleled the bridge outputs.
I also raised the secondary an inch to lower coupling to about .142


Here's the new test run at only half input voltage 340V bus, and 500us on time. It has hit 7 feet now at only 120V in and trips the 20A breaker quickly. There is 240V 50A available  for full power.
I'd like to build a better toroid with less unwanted breakouts before trying 240V in.
Title: Re: Benjamin's DRSSTC 2 in progress
Post by: flyingperson23 on May 04, 2024, 01:33:40 AM
.296uF seems small enough to really limit your current. That also probably makes it sound fuzzier at low bus voltages. I think it'll sound a lot better at full power, especially if you turn up the duty cycle.
Title: Re: Benjamin's DRSSTC 2 in progress
Post by: Benjamin Lockhart on May 04, 2024, 04:21:02 AM
Yes it is, I might change it to 0.44uF with a larger toroid. The initial current ramp up gets to 750A and the steady state current when I turn it up to 2ms is about 500A. This is just at 340V bus.
Title: Re: Benjamin's DRSSTC 2 in progress
Post by: Benjamin Lockhart on May 13, 2024, 07:25:29 PM
I added 2 more primary turns so I can experiment with a high impedance primary and larger toroid.
I'm still building the toroid at the moment.

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