looking for a pll sstc schematic with gate driver ic.

[yourboi]

Hello I have since last time I posted here built a half bridge of RGTH00TS65D. I am working on improving my current sstc driver which is basically a steve wards sstc-5 mini sstc. I purchased a set of 4046B pll chips. I looked around for awhile and ran into this schematic:

Its a pll I am unsure how the potentiometers work as they look like tuning the phase locked loop. most  I watched is a few videos on pll's.

 I want to replace the 40106n with a double run through a sn74hc14n . I also want to use a gate driver ic.

Should I look into drsstc schematics if I want a pll sstc? I want my sstc to be capable of continuous wave mains as well as being interrupted with staccato or filtered. I want to build my way up to that. That is the goal for my next complete project. this may just be a stepping stone to learn how to build a phase locked loop.

 I simply wish to tinker on prototyping board for the next few hours I have a 40106n, sn74hc14n, ucc37322, ucc37322 on hand.

[NyaaX_X]

http://www.scopeboy.com/tesla/dwsstc/wk2.html
You can read that webpage.

sn74hc14n maximum supply voltage is 7V, normally people use 5V regulator to power it. And connect the not used input pins to ground or V+.

PLL SSTC usually designed as a single resonate on and catch the feedback signal from secondary.

The potentiometer, I don't know, but I think it can change the central frequency of the PLL, or the internal VCO frequency of the 4046. I guess. Might be wrong. Sorry

[yourboi]

http://www.scopeboy.com/tesla/dwsstc/wk2.html
You can read that webpage.

thank you. you know what the 10 Ohm resistor is used for in this circuit?

its placement seems weird here it is connected to the positive end of the voltage clamper and pin 10. is it supposed to just connect to pin 10 and that is an error? can it be omitted?

[Anders Mikkelsen]

The 10 ohm forms an RC filter together with the decoupling capacitor for the PLL VCC, to keep gate driver noise from affecting the PLL. In my experience, PLLs can be sensitive to supply noise.

[yourboi]

I got it working. Any idea why it failed when I kept adding objects on top. It needs my hand near it for it to start to draw arcs. It was suddenly able to form its own arc when I added enough objects to the top load. Then it suddenly failed. I don't believe it was the gate drive section that failed. It appears to just be the half bridge. and it definitely didn't seem to overheat my hand was able to touch the heatsink the whole time it seemed like I wasn't stressing the igbts that much. I did not retune the phase adjustment for the new topload. The half bridge had no snubber or tvs diode to block the transients. The half bridge output looked something like this
(attached image) when I ran it with no load. I'm thinking adding more topload somehow caused this transients to cause an issue??? I really don't know. The scope isn't showing the true voltage/division here I believe this is just the gate drive signal. The output to the half bridge is shockingly similar in form with those sharp voltage spikes.

It definitely appeared to be that the circuit wasn't under much stress until I increased the physical size of the top load. I assume the PLL should have been able to adjust to different top load with no retuning. Maybe I put the tesla coil out of range and it locked into a harmonic? my Tesla coil was somewhere around 208khz with a small topload last time I checked. The circuit was capable of interruption working fine at 48v but I did my mains testing in cw. The circuit required my hand close to the topload for the arcs to physically appear large. Once I increased the top load to a point the arcs could maintain themselves then I encountered a sudden igbt failure. The bridge was in a grounded metal box and the low power electronics were in a somewhat shielded metal box with grounded metal surrounding most of the circuit.

my testing was done at 48v to get it to work then I switched to unfiltered mains 120rms 60Hz

I attached a image of something close to what my half bridge output signal looks like.

Here is a short video of the pll in action: https://imgur.com/a/3vmN6gR

I made an imgur album with pictures of my half bridge and driver circuit. I chose to use a Ucc27425 which runs very HOW in cw. The heatsink I added is definitely vital to the circuits function and allowed the circuit to run for very long run times. My schematic has no decoupling capacitors and the 10 ohm resistor I saved myself from drawing what I didn't need to. The 10 ohm resistor also turned out to be vital for tuning with the 10k ohm tuning potentiometer. Without it the pll would not stay in tune. https://imgur.com/a/Hirg9Ii

I dont know how it failed. Im waiting on more igbts.