Half-Bridge SSTC Failed

[NyaaX_X]

I've failed ... I want to make a half-bridge SSTC . Not a DR one . But I screwed up .
I use Steve Ward's DRSSTC 5 driver circuit , change a little bit . And a Irfp450A half bridge . 110V 60Hz rectifie to 331V supply . First I test the power without MOSFET mounted . The 300+V works OK . So I charge the capacitors and turn off the 110V power then test the driver . It seems there are some output . So I turn on the driver and then the 110V . Then the mosfets dead . I hear some strange nosie from the half bridge . And the electrolytic capacitors start heating ... I measure two mosfets and get short Rds . No explosion , Fuse didn't melt . I don't know how and why MOSFET dead that rapidly without and boom or flashing . This happened when I make single MOSFET Class-E too . And I have no idea which one is match to this situation according to richieburrnett's explaining https://www.richieburnett.co.uk/mosfail.html . Or there're some error in my circuit . The resonant frequency is about 900k ~ 1MHz .

[davekni]

Too many issues and possible issues to list.  If you want to be successful, I suggest three steps:
Learn analog simulation.
Get a basic inexpensive oscilloscope.
Study other builds on this forum or from Steve or Mads web pages.  Copy one first before designing your own variation.

Wishing you success in learning!

[NyaaX_X]

Thank you dave . I think so . Now I like a blindman climbing a mountain . That's dangerous . But I still want to know which one may kill these mosfet in that way.

[davekni]

But I still want to know which one may kill these mosfet in that way.

What I'm trying to say is that I don't know which one (or more).  There are many possible causes.  I could ask for lots of pictures and other information, but it would still be hard to tell without scope traces.  Likely there are multiple problems.  Even if one is identified and fixed, FETs might fry again because other problems remain.

[NyaaX_X]

But I still want to know which one may kill these mosfet in that way.

What I'm trying to say is that I don't know which one (or more).  There are many possible causes.  I could ask for lots of pictures and other information, but it would still be hard to tell without scope traces.  Likely there are multiple problems.  Even if one is identified and fixed, FETs might fry again because other problems remain.

Oh. I see. Fine I'll try after I get an oscilloscope or autotransformer . Thank you for answering me , David.

[NyaaX_X]

I want to ask a old question about shoot-through ,free wheel ,and dead-time.

Is these peak current on mosfets while half bridge shooting through be there normaly? Sorry I haven't put leak inductors or parasitics components in the spice. I was searching for this issue these days.

Images 1~3 are from upper mosfet . Two of them are for shoot-through and third one is VDS and VGS (why they are not ZVS?) then forth is two mosfets GDT waveform. All of these are in SPICE.

[davekni]

Great to see simulations!

Is these peak current on mosfets while half bridge shooting through be there normaly?

Current spikes probably are not shoot through.  More likely current required to charge capacitance of diodes and FET Cds, and perhaps reverse recovery charge of opposite diode.

why they are not ZVS?

ZVS requires enough output current (current through C4 and L3) to cause Vds transition during dead time.  Also requires phase lead.  FETs need to switch slightly before current reaches zero.

Before being concerned with shoot through and ZVS, make sure overall function is correct.  In other words, make sure circuit is oscillating at resonant frequency so that current through C4 and L3 builds up cycle-to-cycle.

BTW, helps to label nodes with names.  Otherwise it is more difficult to interpret labels such as V(N0006,N0003).  Easier to read something like V(gate1, bridge_out).

Keep up the simulating!

[NyaaX_X]

Thank you dave ~~ I editted some parameters and they are still wired ... also the ZVS didn't appear (VGS go high before VDS even I use a non feedback circuit..?) , now I use a trigger signal to start oscillation or it won't work. Sorry for I don't know the correct feedback way.  Then here is some image. (That sch1 sch2 are two schottky above mosfet)

[davekni]

Thank you dave ~~ I editted some parameters and they are still wired ... also the ZVS didn't appear (VGS go high before VDS even I use a non feedback circuit..?) , now I use a trigger signal to start oscillation or it won't work. Sorry for I don't know the correct feedback way.  Then here is some image. (That sch1 sch2 are two schottky above mosfet)

Simulations are looking great!  Make sure to save a copy of this version for comparison before refining it further.
BTW, diodes SCH1 and SCH2 and FR1 and FR2 should not be necessary.  FET internal body diodes are likely good enough.

Do any of your inductor models include internal series or parallel resistance?  The only puzzle to me with your waveforms is why primary current doesn't continue to ramp up.  Half-bridge is feeding about 1.5kW into primary.  There must be some loss mechanism that is dissipating that 1.5kW.  Of course, real coils have loss, including arc resistance.  It isn't obvious to me where loss is modeled here.

I'd suggest adding one change at a time (though you could remove SCH1 and SCH2 and FR1 and FR2 before starting significant changes).  Perhaps first, depending on your goals:  Most DRSSTCs use primary current feedback.  Do you want to continue with secondary feedback?  Steve Ward's first DRSSTC from 2004 used secondary feedback, but by 2005 he'd changed to primary feedback.  Today almost all DRSSTCs use primary current feedback.  Only SSTCs use secondary feedback.  Do you want to change?  One key consideration is that primary feedback requires some form of over-current-detection (OCD) to disable driver if current builds too high.

Or, you could investigate startup issue first.  Failure to self-start is a somewhat common issue with real coils.  You will likely need to add a resistor across one of the IGBTs to set initial half-bridge output voltage opposite what the initial enable edge sets it to.

Great progress!

[NyaaX_X]

Sweet , I am making and simulating a single resonant SSTC not a DR ~ That 200n capacitor is DC blocking capacitor but not for tuning . And saying about those diodes I though they can protect MOSFETs more better since I read about the internal diodes are too slow to handle this work from Richieburnett . Especially my coils frequency usually higher then 500kHz . Self start in my testing is working while the interrupter send high to circuit the UCC3732X dirver ICs would push a pulse to GDT . Without oscilloscope is painful . Maybe after some days I get a job that I can get some funds to buy one .

By the way is that waveform between primary is correct ? That voltage squarewave is hollow on their head and bottom .

[davekni]

Sweet , I am making and simulating a single resonant SSTC not a DR ~ That 200n capacitor is DC blocking capacitor but not for tuning .

My mistake.  Yes, I see SSTC in the title.  Waveforms looked so much like DRSSTC that I didn't bother checking.  BTW, you could make C1 and C2 each 100nF and remove C9.  Net result is the same.

And saying about those diodes I though they can protect MOSFETs more better since I read about the internal diodes are too slow to handle this work from Richieburnett . Especially my coils frequency usually higher then 500kHz .

Most often SSTC bridges end up switching before current reaches zero.  In that case diode speed is not important.  If there is enough delay through your driver and secondary Q is high enough, you could end up switching after current crosses zero.  In that case diode speed does matter and those additional diodes are useful.

There is still some loss hiding in the circuit.  Are all your capacitor and inductor models ideal?  No parasitic resistances within models?  Input power is going somewhere in your simulation.  Would be best to figure out where.  In LTSpice, hold down the ALT key while probing a component.  That will plot power dissipation of that part.   It is hard to know if results are accurate without knowing what parasitic resistances are in models to know if they are reasonable for your real coil.

Self start in my testing is working while the interrupter send high to circuit the UCC3732X dirver ICs would push a pulse to GDT .

Self-starting in this circuit can require close to 1ms of on-time, time constant of R5 and C6.  Are you using long enable pulses in the real test, longer than in simulation?  Perhaps reduce C6 to 10nF for simulation to see self-starting work without requiring overly long simulation time.

By the way is that waveform between primary is correct ? That voltage squarewave is hollow on their head and bottom .

Yes.  The curving is voltage drop across FETs since Rds on is not zero.

[NyaaX_X]

Are the value of C1 and C2 effacting performance ? I was assumed those two capacitor is for dividing Bus voltage and supplying each half duty for bridge ? 100nF seems very small compare to other guys' schematic .

Those parasitics are not completely fill in the simulation now cause I don't know some of them. So thery're few still empty. And in the same time, I'm trying to do the same thing to My 2MHz ClassE SSTC simulation but I get many troubles. Let alone I don't know well about the "K" coupling fuction so the waveform is not near the real experiment . Still trying.

PS. Yesterday there're many lightning and thunder visit our city at night. I have a great time. So happy. But it's wired that lightning bolts usually hide in the cloud these years. I remember they were dancing in the sky clearly when I was young...

[davekni]

Are the value of C1 and C2 effacting performance ? I was assumed those two capacitor is for dividing Bus voltage and supplying each half duty for bridge ? 100nF seems very small compare to other guys' schematic .

Perhaps I shouldn't have complicated things by suggesting a simplification.  C9 can swap places with L_Pri, and then C9 can be split into two halves, two 100nF caps, one to each supply rail (to ground and to +330V).  Then C1 and C2 are no longer needed.  I've seen other circuits that don't make this simplification.  Not necessary.  Just saves parts.

Those parasitics are not completely fill in the simulation now cause I don't know some of them. So thery're few still empty.

In LTSpice you can check a box adjacent parasitic resistance values to have them displayed on schematic.  That would help with reviewing your circuit.  It does make the schematic look more cluttered.  However, I don't know any better way when sharing schematics.  (Only other option that comes to mind is to post actual LTSpice schematic .asc file in .zip format.  Then I could download and run and view parasitic resistance values.)  ~1.5kW dissipation seems high without any arc load.  Might be due to one (or more) unrealistic parasitic resistance values.

And in the same time, I'm trying to do the same thing to My 2MHz ClassE SSTC simulation but I get many troubles.

You could start another topic for your 2MHz coil.  Might be more efficient to learn more about simulation and circuit operation from this simulation first.

Let alone I don't know well about the "K" coupling fuction so the waveform is not near the real experiment .

JavaTC does a good job of estimating coupling.  If you need to evaluate coupling on more complex configurations, FEMM is an option, but with a significant learning curve.

PS. Yesterday there're many lightning and thunder visit our city at night. I have a great time. So happy. But it's wired that lightning bolts usually hide in the cloud these years. I remember they were dancing in the sky clearly when I was young...

I also enjoy watching lightening (and timing to thunder to measure distance away from me).  More energy than any of our HV creations.

[NyaaX_X]

OK I change some of it and now the bus voltage is 155V (We use 110V 60Hz AC), I didn't find where the box to show adjacent parasitic resistance values is. Anyway I place the zip file here first.

Saying about 100n Caps I heard about that the half bridge twin capacitors have to keep the 1/2 bus voltage as well as possible so they choose bigger value of them. I even saw some of them use electrolytic capacitors in their circuit . But my friend talk me don't use electrolytic capacitor cause the value of capacitors will decrease after running circuit. I don't know how the value of the two capacitors effect half bridge.

[davekni]

OK I change some of it and now the bus voltage is 155V (We use 110V 60Hz AC), I didn't find where the box to show adjacent parasitic resistance values is. Anyway I place the zip file here first.

For 110Vac (or 120Vac), many designs use a voltage doubler input to get 310Vdc for a half-bridge.
My mistake:  Forgot to say that you must hold CTRL key down during right-mouse-click on a component to have the display option show up.  Perhaps easier to just send .asc file as you did (along with .asy and .lib).
Capacitor ESR values are a couple orders of magnitude too high.  Inductor values look reasonable.
I've never used the "startup" directive to transient analysis.  I need to explore that more.  I'll answer again in a day or two after finding time to explore your circuit a bit.  You may want to explore too after fixing cap ESR values.  Around 0.25 ohms is reasonable for 390uF electrolytic.  Around 0.05 ohms would be more reasonable for 100nF film capacitors.  I haven't checked everything yet.

[NyaaX_X]

OK I'll put a zip in the 2MHz coil thread . ^ ^ I was use 311V mutiplier to this half-bridge but it failed. That I use two diodes and Caps so That I can't access bus line easily to use low voltage SMPS to power it. So maybe I'll use a Full bridge rectifier chip do replace it and add a switch to change 155V and 311V.

[davekni]

After playing with varying arc load, it becomes apparent that most cases end up with slight phase lag (half-bridge voltage transition slightly after primary current crosses zero).  Given that, I retract my previous recommendation to remove diodes SCH1, SCH2, FR1, and FR2.
Found series resistance for C_Sec to model arc load.  That is where most power is going as it should.  I'd suggest a slightly more complex model.  Leave C_Sec as a pure capacitance with no parasitics.  This models the top load.  Then add a second capacitor and series resistor to simulate arc capacitance and resistance.  There are forum discussions about yet more complex arc models (and I have made some myself).  Not worth the work without detailed measurements to fit model.
Below is what I've been simulating with today.  Many parasitic values are displayed, hopefully all the important ones, and some that are unlikely to matter much but you already had reasonable values for.  Didn't show GDT values.  They are fine but not important.  If you want a more realistic GDT model, first step is to make coupling factor slightly less than 1 (adds leakage inductance).  How much less depends on how your GDT is constructed.



I've removed the start oscillator.  Once capacitor series resistances are reasonable, starts up quite well without additional help.
FET and one diode part numbers are different since I didn't have models for correct parts.  Shouldn't make any difference in basic operation.
Added R5 and R6 to force initial half-bridge output to center between supplies.  Wasn't necessary for simulation but is a good idea in practice to make sure startup is reliable.

[NyaaX_X]

Thank you dave. ^ ^

I imitate your way and I notice that the schottky diodes reverse breakdown voltage is 40~60V in my choosing. But the peak voltage on it may jump to 80V+. Is that harmful or diodes will clamp them to Vbrk?

[davekni]

I imitate your way and I notice that the schottky diodes reverse breakdown voltage is 40~60V in my choosing. But the peak voltage on it may jump to 80V+. Is that harmful or diodes will clamp them to Vbrk?

I don't know avalanche energy capability of your schottky diodes.  Easy to fix with another anti-parallel diode across each schottky.  Only reverse current is that coming from charging Cds of FET.  A small (1A for example) reverse (anti-parallel) diode will keep voltage low.  As long as forward drop of new reverse diodes plus forward drop of FET body diodes are more than forward drop of FRD diodes, should still work the same.  Or add a small low-voltage bidirectional TVS diode across each schottky diode.

[NyaaX_X]

I put a 10nF capacitor parallel to fast recovery diode. Apply to two bridges and the startup peak turn quite small. But when the Enable signal that into UCC3732X turn low. The voltage cross schottkys still high.

Or I just use Fast recovery rectifier diode to replace those schottkys ? Their Reverse Recovery Time in manual is 50ns. And this Coil have 650+-Hz resonant frequency.