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Messages - Hydron
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401
« on: April 16, 2018, 09:55:14 AM »
I'd agree that this may not be a big issue for a QCW coil - topload voltages are much lower and the spark growth seems to be driven by the field at tip of the arc. If the topload is already finished then I'd test it on the finished coil before worrying about whether it needs to be changed.
402
« on: April 15, 2018, 03:35:07 PM »
This scheme is not as fool-proof as the transformer scheme. If there were, for some reason, a mismatch in switch timing (or if a bridge leg fails to switch) then the capacitor impedance to the very fast switching voltage is pretty much zero and you will see "shoot through" currents between bridge legs. What i mean is, imagine 1 bridge output switched hi, but the other "parallel" one was still low, you are now applying 2 different voltages to the same node in your circuit, and if the impedance between those voltages is small (remember, capacitor impedance approaches 0 at very high freq) then currents are big.
This does concern me for the coil I am building - I have done some simulations and the results aren't pretty if one half-bridge fails for some reason. I plan to try and do some sort of sensing to shut everything off if there is a fault like this (potentially by looking at current or voltage difference between half-bridges - I have a separate CTs for each so have a few options for how I do it). I also am looking at how to limit fault current from any failure so that I'm not dumping several kJ from the main storage caps into a failed IGBT - am currently looking at a simple DC rated fuse, or potentially using a low-VCE(sat)/Rds(on) IGBT/MOSFET as a fast switch for reacting to a fault situation (in this case with more flexibility than a simple fuse). Steve (and others) - any suggestions/ideas on either of these issues would be welcome! The other question I have for Steve is regarding the impedance of his transformer coupled coil - I'm interested in what the primary tank values are and what the transformer ratio is to see what the tank circuit impedance looks like to each half-bridge (and to compare it to what I have, which has no transformer but a relatively low tank impedance for a QCW coil).
403
« on: April 05, 2018, 12:53:57 PM »
Run time config of the UART port sounds good - could be configured by USB connection initially then can be used later in UART mode.
I like mounting the fibre TX/RX parts on the PCB directly, but for a more general design having the header and external perf-board mounted parts makes sense. It also allows use of a bluetooth SPP transceiver unit as another alternative to the expensive fibre parts.
404
« on: April 02, 2018, 10:09:23 PM »
A quick check looks OK, but haven't got the time now to go through thoroughly sorry. UVLO pin needs to be moved to a P12_x location I believe, but didn't see anything else wrong with the PSoC pinout, but as your said it should be test-compiled with the IDE to be sure.
405
« on: March 25, 2018, 12:58:38 AM »
Yes, I agree. Primary current being even more interesting than base current, since it reflects the amount of power transferred to the secondary due to arc load and arc detuning.
300 Hz lower bandwidth looks ok. I guess that depends much on the loading resistor for your CT. It should be quite low.
For reference, these are what I am planning to use for the measurements: http://pearsonelectronics.com/pdf/2877.pdf (x2, for topload measurements) http://pearsonelectronics.com/pdf/4100.pdf (for secondary base current) http://pearsonelectronics.com/pdf/7800.pdf (for primary current) Still playing tourist in Australia right now, so haven't had a chance to look at your hard work yet sorry!
406
« on: March 23, 2018, 12:59:28 PM »
The 2877 CTs have a bandwidth of something like 200MHz, so will not be the limiting factor. I was proposing to use a 35MHz CT for the base current measurement and a 2MHz CT for primary current (determined by what i have available - 2x2877, a 4100 and a 7800). I would be surprised if the CTs filter anything of interest out with a lower -3dB of 300Hz. I assume that you agree the best way to use 2 extra channels is to measure current?
407
« on: March 22, 2018, 11:51:49 PM »
Thanks for the analysis, will read through it properly when i get a chance (busy travelling at the moment).
I will be in the position to do some more measurements in a week or so with a few improvements: - sampling a bit quicker (100MSa/s) - probably sampling at 14 bit rather than 10 - will use a couple of pearson model 2877 CTs for toroid current measurements rather than the resistors used earlier - simultanously measure primary/secondary-base currents with a second scope (triggered via fibre link from first scope - will need to calibrate the delay) - better characterise the coil prior to measurement, i.e. do better physical measurements, check resonant frequencies of secondary (with/without toroid) and primary (with/without secondary) and also check MMC and primary tap points
If there are any other suggestions of how to improve the measurements then I'd be happy to hear them. I'm assuming that measuring primary/secondary-base currents is the best use of the second scope rather than using one of the channels to look at bridge voltage output? (Might be able to have a 1-bit value recorded of that anyway via the ext trigger input).
408
« on: March 15, 2018, 10:40:03 PM »
Sorry to hear it blew up, but good to hear the 1/2 second was OK! I would recommend trying polypropylene capacitors rather than polyester next time - polypropylene is much better for this use.
409
« on: March 14, 2018, 05:08:03 PM »
It's not a UD3 (that's a completely different design based on a PSoC 5LP - see the "Next Gen DRSSTC" thread), but the driver is definitely of interest - if it works well it could be a useful option for a pre-built, cheap driver. Please let us know how it works - I'm not sure anyone has tried this one before!
410
« on: March 14, 2018, 05:04:08 PM »
I still think it will have close to zero effect - the black ring will be <1uH which is tiny in comparison to the reactance of the capacitors at TC frequencies. For example at 500kHz (a reasonable guess, if anything on the high side which makes the lead wire effect bigger:
14*0.1uF in series = 7nF, reactance at 500kHz = ~45 ohms per string of caps
With an estimate of 1uH for the black wire(generously large - it's likely a quarter of this or less from the geometry) gives reactance of ~3 ohms @ 500kHz, or less than 10% of the capacitor reactance.
While there will be some effect from different connection points, I don't think it will be enough to change much at all - certainly won't cause enough difference in current to have an effect on current sharing/heating.
411
« on: March 14, 2018, 12:18:56 PM »
Hmm, I would have thought that the impedance due to the capacitive reactance would swamp the effect of lead inductance - I'm not sure I agree with Mads on this one and personally wouldn't be concerned with the lead length.
412
« on: March 12, 2018, 08:31:02 AM »
For my 160mm (~6") coil I used PVC pipe end caps with M12 (~1/2") nylon bolts. I obtained them from a components distributor who specialised in plastic hardware, and were as big as I could buy without paying crazy money. Wish I'd bought a few more for future projects!
413
« on: March 12, 2018, 08:23:55 AM »
Yeah I was thinking about overcurrent, but didn't expect it to do phase shift during ringdown. The threshold is also set to 225A, rather than <150A where it seemed to trip earlier. Later on in the burst it does trip at the correct point, as seen below (QCW modulation finished by this point): And another with odder behaviour (overall view, part of interest at division labelled 16.05ms): Zoomed in: I am still suspicious that there is some element of interference from the hard switching spikes happening here - behaviour seemed better when I'd reduced them by modifying the bridge. Unfortunately I don't think I'm going to have a chance to work on the coil again to test anything until about this time next month, however I will have a go with using the UD3 (and also taking some arc current measurements) on a larger DRSSTC if time permits.
414
« on: March 11, 2018, 11:17:45 PM »
So I got the coil running outdoors, unfortunately with wind and in the middle of the day so no worthwhile video, but I have attached a pic of the setup taken from the "control room" (upstairs window where the variac, scope and PC were): Control was via serial over the orange fibre optic lead, and I was able to look at bridge output current/voltage using a pearson CT and a couple of differential probes. The heater that can be seen is acting as ballast for my poor 2A Variac so it won't blow it's brushes to bits trying to charge the caps after each burst The test was a success in that nothing went pop at 360VDC on the bus (variac cranked up to 11 on 240VAC supply), but the coil didn't behave that well otherwise. The spikes seen when hard switching were rather extreme, at up to ~750V (that may be a little high - I know that the probes used will ring themselves due to parasitics of the leads they use, but having checked with other standard 100x probes, I know the spikes are still there and large). This seems to cause the controller to lose ZCS synch, and causes waveforms like the following throughout most of the burst: I'll be looking at the code to see if it can be made more resilient to noise, but to really fix things I think I'll need to get a revised version of the coil running with better layout etc (and higher current capability with 4x the number of IGBTS - was hitting my 225A limit a lot!). It has been really useful building up part of the bridge as a small scale prototype though - I've learnt a lot about what I should do for the final coil and will probably re-use some of the spare parts to make a smaller coil in the future.
415
« on: March 11, 2018, 10:31:02 PM »
It might be fine if the theremin tank circuit and DRSSTC tank circuit operate sufficiently far away from each other in frequency, and the broadband noise produced by the coil isn't too bad. I do like the idea!
416
« on: March 07, 2018, 04:05:47 PM »
Anything that works over a <5MBps fibre link should be fine. Not sure how you'd do CAN, but the RS485/RS232 based protocols will work fine with fibre as the physical layer rather than differential twised pair copper, as they're basically asynchronous serial at heart. Absent something more standardised I had actually thought of re-purposing a RS485 protocol we use for CCTV control at work (mainly because there's well-debugged code that I could re-use, though not release), but using something standard and open-source would be best.
I'm just putting together a Mouser order for UD3 parts, and the 80MHz speed grade part (CY8C5888AXI-LP096) is barely more than the 67MHz part, so I'll build a board up with one of those and have a go at increasing the clock frequency (work on the clock speed will likely be delayed by a long vacation though).
Lastly, I'll probably have a go at running my coil outside at full mains voltage in the next few days - will try and get video of the success/destruction.
417
« on: March 05, 2018, 11:06:11 AM »
Yes, that's why I haven't changed the clock speed yet - I saw some stuff in the code that would need to be changed before the PLL frequency can be set to 80MHz.
418
« on: March 05, 2018, 09:43:43 AM »
This is exactly what I discussed with Mads on IRC - it's definitely possible to lay out a board using a PSoC dev board + headers as a "through hole" part, and the dev board is _cheaper_ than the chip by itself. I'm probably not going to do such a layout myself (gonna stick to SMD), but am happy to help someone who is. BTW I disagree that soldering a QFP counts as "exotic", but the cheaper argument remains, and the dev board also comes with a USB connector inbuilt and even a whole extra PSoC chip (the programmer chip could be re-used as another mini dev board if you don't need many pins!)
The only reason I haven't posted more detail is because my setup is such a hack, and while all pins are routed on the PSoC, many are un-used. I just have the gate drive pins (going to another PCB with the actual drive circuitry on it - the green board in the top of the attached pic), UVLO shorted to +5V, CT current-sense and ZCS pins used. I've attached a close-up of the breadboard setup (note that while there is a crystal on there I couldn't find the right load capacitors in my parts box so I'm using the internal oscillator, which is really good enough anyway).
The biggest thing to watch for is to make sure that all pins can be internally routed to the required places on the PSoC chip - there are some restrictions as to what pins can go where on the chip, and limited routing resources (especially for analogue), so I had to shuffle some pins around the chip until the PSoC creator software could find a way to route everything. The other thing that should be done (but doesn't have to) is to adjust the speed that the PLL is running at - the PSoC dev board has a faster version of the chip than the UD3 design, and can run up to 80MHz rather than 67MHz (actually set to 64).
419
« on: March 04, 2018, 10:34:17 PM »
I've managed to get the UD3 code up and running on a CY8CKIT-059 PSoC dev board (see http://www.cypress.com/documentation/development-kitsboards/cy8ckit-059-psoc-5lp-prototyping-kit-onboard-programmer-and), and it's happily running my hacked-up QCW coil using both the serial/USB CLI interface and USB midi input. See the attached pic of the rats nest of cables I was using to run it - breadboard with PSoC PCB is above the mousepad (bench PSU power has now been replaced by a variac+isolation transformer and things have been tidied a little!). I also took a quick video of it running at 130V on the bus (obviously more space will be needed to put real power through the coil!): /> I have run it up to ~170V on the bus, though I am running into issues much above 130-150V with interference occasionally causing the controller to lose ZCS sync - probably not a surprise given how messy it is. The spikes on the hard switched transitions (in QCW phase shift modulation mode) are also quite large and a little worrying - I will need to look carefully at the PCB layout of the bridge and the gate drive resistors etc to see if I can tidy it up a bit. To get it running on the dev board + breadboard setup I had to do a bit of work changing it to compile on the (slightly) different PSoC part, and have a few goes with pin selection to get the analogue routing to complete. I haven't had time to look at much of the code other than this stuff, though I do intend to get in and add/change things, and to have a go at getting an interface other than a serial console working. Thanks to Netzpfusher and Steve for their work - has been fun getting it making sparks, and has helped hugely with testing things before I do any more PCB/software design for my coil.
420
« on: March 04, 2018, 09:30:06 PM »
Yeah I was wondering if it was pulsed DC or not - the pulsing action probably helps a lot with stopping the gap from just pulling a big arc directly from the power supply. The other way to do it is with DC resonant charging (see http://www.richieburnett.co.uk/dcreschg.html#resonant ), but that requires the extra choke and diodes.
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Re: Plasma Torid - Class E Self Resonant Dual/Stereo - Plasma Torid Build
[Dual Resonant Solid State Tesla coils (DRSSTC)]
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alan sailer April 11, 2024, 12:30:21 AM
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Re: Tesla coil safety questions, risk analysis quantified
[Beginners]
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alan sailer April 10, 2024, 11:41:46 PM
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Re: Tesla coil safety questions, risk analysis quantified
[Beginners]
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Mads Barnkob April 10, 2024, 11:33:32 PM
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Re: Tesla coil safety questions, risk analysis quantified
[Beginners]
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Michelle_ April 10, 2024, 10:41:33 PM
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Re: Tesla coil safety questions, risk analysis quantified
[Beginners]
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MRMILSTAR April 10, 2024, 10:31:31 PM
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Tesla coil safety questions, risk analysis quantified
[Beginners]
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Michelle_ April 10, 2024, 09:56:35 PM
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Re: Drsstc voltage spike question
[Dual Resonant Solid State Tesla coils (DRSSTC)]
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unrealcrafter2 April 10, 2024, 08:59:26 PM
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Re: Drsstc voltage spike question
[Dual Resonant Solid State Tesla coils (DRSSTC)]
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markus April 10, 2024, 06:35:30 PM
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Re: Drsstc voltage spike question
[Dual Resonant Solid State Tesla coils (DRSSTC)]
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flyingperson23 April 10, 2024, 05:35:14 PM
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Medium Drsstc question
[Dual Resonant Solid State Tesla coils (DRSSTC)]
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unrealcrafter2 April 10, 2024, 03:07:02 PM
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Re: Plasma Torid - Class E Self Resonant Dual/Stereo - Plasma Torid Build
[Dual Resonant Solid State Tesla coils (DRSSTC)]
|
Michelle_ April 10, 2024, 03:42:12 AM
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Re: Plasma Torid - Class E Self Resonant Dual/Stereo - Plasma Torid Build
[Dual Resonant Solid State Tesla coils (DRSSTC)]
|
Michelle_ April 10, 2024, 03:41:04 AM
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Re: Plasma Torid - Class E Self Resonant Dual/Stereo - Plasma Torid Build
[Dual Resonant Solid State Tesla coils (DRSSTC)]
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sky-guided April 10, 2024, 02:50:23 AM
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Re: DRSSTC V1 using BSM1500
[Dual Resonant Solid State Tesla coils (DRSSTC)]
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Unrealeous April 10, 2024, 01:32:17 AM
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Re: Plasma Torid - Class E Self Resonant Dual/Stereo - Plasma Torid Build
[Dual Resonant Solid State Tesla coils (DRSSTC)]
|
OmGigaTron April 10, 2024, 01:26:29 AM
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Re: Plasma Torid - Class E Self Resonant Dual/Stereo - Plasma Torid Build
[Dual Resonant Solid State Tesla coils (DRSSTC)]
|
OmGigaTron April 10, 2024, 01:18:35 AM
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Re: Big Coil Big Sparks
[Dual Resonant Solid State Tesla coils (DRSSTC)]
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Mads Barnkob April 09, 2024, 07:34:19 PM
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Re: DRSSTC V1 using BSM1500
[Dual Resonant Solid State Tesla coils (DRSSTC)]
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flyingperson23 April 09, 2024, 06:14:27 PM
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Re: CM400 Induction Heater
[Electronic Circuits]
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markus April 09, 2024, 06:08:53 PM
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Re: DRSSTC V1 using BSM1500
[Dual Resonant Solid State Tesla coils (DRSSTC)]
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markus April 09, 2024, 05:15:19 PM
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Re: Plasma Torid - Class E Self Resonant Dual/Stereo - Plasma Torid Build
[Dual Resonant Solid State Tesla coils (DRSSTC)]
|
Michelle_ April 09, 2024, 05:11:04 PM
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Re: Big Coil Big Sparks
[Dual Resonant Solid State Tesla coils (DRSSTC)]
|
Benjamin Lockhart April 09, 2024, 06:32:16 AM
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DRSSTC V1 using BSM150
[Dual Resonant Solid State Tesla coils (DRSSTC)]
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Unrealeous April 09, 2024, 04:04:47 AM
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