Author Topic: How much propagation delay is too much propagation delay  (Read 147 times)

Offline Power-Max

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How much propagation delay is too much propagation delay
« on: June 10, 2021, 05:10:24 AM »
I built a half bridge using some IGBTs, 6 ohm gate resistors, a 2222 and 2907 totem pole current amplifier, the IRS2186 bootstrap gate driver IC, which is driven from a Dead-time-insertion circuit that delays a rising edge by about 200ns and the falling edge by the smallest amount possible, by about 50ns or so).

The problem is when I attempt to close the loop using antenna or secondary base feedback (into anti-parallel high-speed diodes) the output isn't what I expect. The circuit is a good bit away from resonance. And I suspect it may have to do with all these propagation delays adding up: 20ns or so for the IGBTs (turn-on delay), the 170ns of the IRS2186, and the 200ns of dead-time insertion from the circuit I made using some RC circuit, diode, and 74HC86. It all adds up to a maximum worst-case of about 600nS. Or about 20% of the operating frequency (assumed 300kHz, it is actually 320kHz small-signal and drops to 270kHz when approaching the secondary with a ground rod or ground plane or with decent breakout).

If I drive the input with a fixed frequency from a function generator and manually tune it, I can get nice 1 foot long hot continuous wave arcs, and I'm pumping about 880W (measured about 8A) from a 110VDC power supply. I also tried making the circuit have variable dead-time to adjust the power going into the arc but unless I allow it to have an open streamer to air (maximum loading, and maximum damping of secondary) this is not a good technique for audio modulation. I need to be able to pull power back out of the resonant network and return it to the supply, which is done by running out of resonance.

I suspect this may be one of the reasons I can't quite get my PLL tesla coil to work right once I close the loop. I occasionally fry these stupid gate driver ICs or my IGBTs when my PLL locks onto some weird harmonic or outputs a non-symmetrical square wave causing issues for the half bridge

Offline davekni

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Re: How much propagation delay is too much propagation delay
« Reply #1 on: June 11, 2021, 05:16:03 AM »
For feedback, your options are:
1) Add enough phase-lead to compensate for the delay.
2) Invert the feedback and add enough phase-lag (additional delay) to get almost another 180 degrees of lag.  I say "almost" because half-bridge switching is most efficient and clean when voltage changes slightly before current zero-crossing.
For your situation, I recommend (2) above.  Adding delay is easier, especially given how much delay you already have.  I've used three stages of series resistor and parallel (to ground) capacitor for this purpose.  Each stage is progressively higher impedance (higher R, lower C) to minimize load on previous stage.

For PLL operation, design the PLL to have a narrow frequency range and fixed 50% duty cycle.  That way it cannot lock to harmonics.

One variation on a narrow-band PLL that I've used:  Start with an open-loop L/C oscillator feeding the bridge.  Adjust it's frequency (variable inductor in my case) to your desired center frequency.  Then add a turn around the inductor as loosely-coupled magnetic feedback.  In my case (SSTC), this turn was secondary current.
David Knierim

Offline Power-Max

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Re: How much propagation delay is too much propagation delay
« Reply #2 on: June 11, 2021, 06:32:02 AM »
For feedback, your options are:
1) Add enough phase-lead to compensate for the delay.
2) Invert the feedback and add enough phase-lag (additional delay) to get almost another 180 degrees of lag.  I say "almost" because half-bridge switching is most efficient and clean when voltage changes slightly before current zero-crossing.
For your situation, I recommend (2) above.  Adding delay is easier, especially given how much delay you already have.  I've used three stages of series resistor and parallel (to ground) capacitor for this purpose.  Each stage is progressively higher impedance (higher R, lower C) to minimize load on previous stage.

For PLL operation, design the PLL to have a narrow frequency range and fixed 50% duty cycle.  That way it cannot lock to harmonics.

One variation on a narrow-band PLL that I've used:  Start with an open-loop L/C oscillator feeding the bridge.  Adjust it's frequency (variable inductor in my case) to your desired center frequency.  Then add a turn around the inductor as loosely-coupled magnetic feedback.  In my case (SSTC), this turn was secondary current.

I set my PLL to run at between 180kHz to 320kHz (this range may be a bit on the high side) with a 100pF capacitor and I forgot the values of R1 and R2. I am using the digital memory network, as I want to reduce the phase lag, instead incorporate phase lead. I do this by then adding a BJT as a current source to the VCO capacitor to inject a constant current into the capacitor, creating a permanent offset and a phase lead. The output of phase comparator II is then constantly trying to compensate and switching early. If I go too far the coil output diminishes significantly and gives very hot and short arcs.

I notice that under certain conditions the output from the PLL has a duty cycle that can be quite off from 50%. What causes this? IGBTs also tent to get quite toasty. I need to see if it's ohmic or switching losses, I just wired up a current transformer today but one of the IBGTs gave up before I got a good reading of the RMS voltage of the 0.1 ohm resistor. The current waveform was very distorted and seemed to have an amplitude around 200mV or so. With a 30:1 winding ratio that seems to be about 60A? Running with 2 turns and 110V ~8A input, continuous duty. I guess that is about 240W of power dissipation...  :P Using a CPU heatsink with a 80mm PC fan running on the 15V supply

Offline davekni

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Re: How much propagation delay is too much propagation delay
« Reply #3 on: June 11, 2021, 06:47:52 AM »
My guess for non-50% duty cycle is the phase comparitor output filter bandwidth is too high.  That allows significant VCO-frequency signal to get through to the VCO input.

Most people use FETs for SSTC.  With feedback from secondary (antenna or secondary current), it is difficult to get bridge switching just before primary current zero-crossing.   IGBTs have too high switching loss at 100+kHz to use with hard-switching (switching away from current zero-crossing).
David Knierim

Offline Willsmith001

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Re: How much propagation delay is too much propagation delay
« Reply #4 on: June 11, 2021, 11:07:00 PM »
Thanks for your post.

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Re: How much propagation delay is too much propagation delay
« Reply #4 on: June 11, 2021, 11:07:00 PM »

 


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