GDT (Gate Drive Transformer) tutorial

[davekni]

Hopefully this isn't wasted redundant work.  I've seen many builds with good GDT construction, using both halves of each twisted pair.  However, all the GDT construction guides I've found use a single primary wire.  Below is construction of a half-bridge GDT using two twisted pairs from CAT5 cable.  This is easier to see in pictures.  Extension to full-bridge isn't difficult.  Use four pairs, with four paralleled windings for primary, one wire from each pair.  (BTW, CAT5 isn't necessary.  If starting with single wires, twist pairs together, and use those pairs exactly as you would with pairs extracted from CAT5 cable.)

Start with a suitable high-permeability ferrite core.  (Some options listed at the end.)  The core I'm using here works, although the shape is not typical.  Pay attention to winding technique, not so much to core shape.

Wind two (for half-bridge) twisted pairs around the core.  More discussion about the number of turns to follow.  See subsequent post on this thread:
    https://highvoltageforum.net/index.php?topic=1854.msg19355#msg19355
I'm using 4 turns here.  Mark the starting end of all four wires for later identification.  Here I've "marked" starting ends by length (short), with the tail ends left longer.  Other (preferred) options are to add bits of tape to the starting ends or strip insulation from the starting ends only.





Untwist the pairs almost to the core:



Twist each wire (each winding) with itself all the way back to where the pair twisting starts.  Don't leave any significant loop area of untwisted wire:



Pair one winding of each pair together for the primary.  I've chosen the lighter-color wire of each pair for simplicity, white and light-blue.  Most important: connect the two starting ends (short ends or stripped ends or however you marked them) together, then the two tail ends together.  If pairing is swapped, driver can be damaged by the shorted load.  (Test at very-low duty cycle initially just in case of error.)  The remaining winding of each pair is for an IGBT.  Starting end of one IGBT winding is gate.  Starting end of other IGBT winding is emitter of other IGBT.



Since I hadn't used tape to identify starting ends at the beginning, I added tape now.  Then cut the tail ends to length and strip.  Connect the two primary tail ends together:



The reason for the twisting is to minimize leakage inductance.  Leakage inductance slows down gate waveforms and causes overshoot and undershoot and generally-sloppy gate drive.  Twisting forces the wires to remain close together with little loop area between wires for magnetic field to slip through.  Best to maintain this pairing all the way to the driver for primary and all the way to gate and emitter terminals of IGBTs (or FETs) for the secondaries.  Avoid excess loop area when adding gate series resistors.  Keep the emitter wire adjacent the resistor to minimize loop area.

Now for a bit about cores and turns.  I'll add a second post on measuring cores and finished GDTs, a bit more advanced topic.
Toroid shape is generally preferred, but E-cores work if ungapped (no air gap or spacer between the two halves).
Most important two parameters are:
     Core material (reasonably-high permeability and saturation flux density).
     Core cross-sectional area.  Picture the area of a core slice inside one turn of the GDT winding.
Iron and other compressed-powder cores never work well.  Most (but not all) ferrite materials are OK.
Low-frequency EMI suppression cores are reasonable.  That is what I used above.  Most larger EMI cores are low-frequency, so workable.  This includes common-mode chokes found in power supplies.  (Remove existing windings.)  Such EMI materials include:
3C11, 3E6, 3E12, 3E10, 3E15, 3E25, 3E26, 3E27, 3E65
More ideal ferrite materials are generally designed for switching power supply transformers etc.  These include:
PC40, PC200
N27, N30, N35, N41, N49, N51, N72, N87, N88, N92, N95, N96, N97
T35, T37, T37, T38, T46, T57, T65, T66
3C90 through 3C97

Concerning cross-sectional area, more is better, within constraints of fitting the GDT mechanically into the build.  The core I used above is 28mm long, 14mm ID, 28mm OD.  The ring is 7mm thick (0.5 * (OD - ID)).  So cross-sectional area is 7mm thick * 28mm long = 196mm^2.  If using a more-typical ring toroid, the formula includes a factor of PI/4:  Area = length * 0.5 * (OD - ID) * PI / 4.

In general, look for cross-sectional area to be at 50mm^2 or more.  A bit smaller is fine for high-frequency Tesla coils.  Larger for low-frequency coils.  10 turns is usually plenty.  Excess turns increases wire length and therefore leakage inductance.  The above example is 4 turns.

(All my GDTs have either 2 turns or 3 turns.  That works with large area cores and careful measurement to make sure its enough.  A few more turns is generally safer.  Too many turns causes subtle issues due to leakage inductance.  Too few turns is more catastrophic, possibly damaging the driver and/or IGBTs when the core saturates.)

Here's a great picture from Mads of a full H-Bridge GDT constructed this way:
https://highvoltageforum.net/index.php?topic=1856.msg13969#msg13969

A couple other posts with images that aren't quite as obvious.  For this first, look at the upper GDT wound with CAT5 cable including jacket:
https://highvoltageforum.net/index.php?topic=588.msg3779#msg3779
And this 3-turn GDT from my bridge tutorial:
https://highvoltageforum.net/index.php?topic=1324.msg9886#msg9886

[agguilar]

Can this video work for calculation it haves a excel file

[davekni]

Can this video work for calculation it haves a excel file

I have no way to know if the excel file calculations are correct.  Presuming they are correct, there are additional factors to consider:
Will you be running a continuous frequency as in the video?  Or will you be starting and stopping gate drive as in typical SSTC and DRSSTC use?  For a given frequency, startup requires either more core area or more turns.
1:1 GDTs as in my tutorial have less leakage inductance than other ratios.  If possible, use a driver that generates the needed gate voltage directly rather than boosting from 12V to 15V as in the video example.  Then wind a 1:1 GDT per my tutorial, using the excel sheet for calculating needed turn count.

[davekni]

Calculating number of turns needed for a GDT:

Any ferrite core will have a maximum total magnetic flux (SI units of Weber).  Magnet flux = flux density (SI units of Tesla) times core cross-sectional area (in square meters).  Saturation flux density is a specification parameter for most core materials.  If you are using a ferrite core of unknown specifications, 0.4T is a good value to use for transformer cores, 0.25T for EMI filtering cores.

Core flux is the time (units of seconds) integral of volts / turns.  Presuming volts is constant (square wave GDT input signal), the integral is a simple algebraic formula:

Flux (Webers) = time * volts / turns.

Maximum flux capability of a core can be calculated as above:

Saturation flux (Webers) = Saturation flux density (Teslas) * core area (square meters) = time * volts / turns.

Solving for turns:

    Turns = time * volts / (saturation_flux_density * area).

This formula also works if time is in microseconds and area is in square mm.  (Scales top and bottom of divide by 1E6 each.)  I find mm^2 and microseconds (abbreviated "us") more convenient units for GDT calculations.

Time here is a half-cycle of TC operating frequency.  For margin, pick the lowest frequency your coil may need to operate.  Then:

    Time (us) = 0.5 / frequency (MHz) = 500 / frequency (kHz).

However, for pulse skip mode of DRSSTC operation (UD2.9 or UD3.x drivers), time is a full cycle.  During pulse-skip, GDT frequency will be half operating frequency.  So for pulse skip:

    Time (us) = 1 / frequency (MHz) = 1000 / frequency (kHz).

Volts is the voltage of the driver, such as 24V for typical UD2.7.  Saturation flux is a core property, as is area.  Once you know these four parameters, pick turns by the above bold formula.  For extra margin away from saturation, add a turn or two.  Generally no need to use many extra turns.

For example:
Consider a toroid core with minor diameter of 12mm and saturation flux density of 0.4T.  Design a GDT for minimum frequency of 100kHz using +-24V gate drive and no pulse-skip mode.
Time = 500 / 100kHz = 5us half-cycle.
Area = 12 * 12 * PI / 4 = 113mm^2.  Note that 12mm diameter must be of core itself, not including any epoxy coating.
Turns = 5us * 24V / (0.4T * 113mm^2) = 2.655 turns.  Of course, turns is an integer, so at least 3 turns are required.  4 or 5 turns for margin.  No need for 8 or 10 turns as is more common.  (Unless using pulse skip, in which case twice the turn count is needed, 5.31, so 6 turns minimum, 8 for margin.)

One other consideration:  The above presumes core permeability is high.  Most ferrite cores have reasonably high permeability.  (Powdered iron cores don't, that's why they are bad for GDT.)  However, some EMI cores have somewhat low permeability, say 200-500 rather than 2000 to 5000 of typical transformer ferrites.  In that case, a GDT with minimum turn count will require somewhat high current for magnetization.  This higher current, especially at low frequency, can be a problem for drivers that do not have a FET buffer stage after the driver chip.

Please feel free to offer suggestions or clarification.  I'll edit as appropriate.  And especially, if I've made a mistake above, please point that out.  I'd really hate to leave an incorrect tutorial posted.