Author Topic: Next Gen DRSSTC  (Read 31845 times)

Online Netzpfuscher

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Re: Next Gen DRSSTC
« Reply #120 on: November 19, 2020, 06:50:37 AM »
I won't change the max start cycles. There must be something wrong with your coil. You know that your coil is hard switching during startup?  ;)

But you can do it yourself, don't set values over 254, it is only a 8 bit counter:

https://github.com/Netzpfuscher/UD3/blob/8485ae9c3ac583cc6fc78cb531a84307acef4161/common/ud3core/cli_common.c#L216

Offline TMaxElectronics

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Re: Next Gen DRSSTC
« Reply #121 on: November 19, 2020, 11:52:28 PM »
I finally finished my new coil, can't wait to test it at the lab with more space (and maybe Netzpfuschers coil too)

Setting it up was so much easier than with more basic drivers too.
Just hook up the primary and run the autotune to see if it is tuned right, and that's it :D
No messing around with an oscilloscope, the feedback polarity, or tweaking potis to get the lead time correct. Just type in the numbers and the coil works, pretty awesome to be honest.

Offline Intra

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Re: Next Gen DRSSTC
« Reply #122 on: November 21, 2020, 12:52:35 PM »
I won't change the max start cycles. There must be something wrong with your coil. You know that your coil is hard switching during startup?  ;)

But you can do it yourself, don't set values over 254, it is only a 8 bit counter:

https://github.com/Netzpfuscher/UD3/blob/8485ae9c3ac583cc6fc78cb531a84307acef4161/common/ud3core/cli_common.c#L216

Thanks! Yes, you were right. Something was wrong with a coil. After deep analysis I found that my flashovers from previous test some way burnt sensor's comparator or +\-12v supply driver chain. After I cut out all peripheral driver part the signal became looking good.

Anyway, I choosed secondary and primary inductors for mmc I have and looks like the impedances is not matched good. Result of 20mS under 60A current limit is about 10-15cm spark.


Nevertheless I want to try to oscilate whole coil on start freq because I see the coil grab a feedback and sometimes jump between poles and I do not see another way besides to force a coil to sometimes hardswitch through the whole freq sweeping down under spark loading so please if you can change the start cycles counter to 16 or 32 bit I will be very appreciated.

« Last Edit: November 21, 2020, 01:24:24 PM by Intra »

Offline Hydron

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Re: Next Gen DRSSTC
« Reply #123 on: November 21, 2020, 06:22:26 PM »
Netzpfuscher pointed at the place where the range can be changed - treat it as an opportunity to learn how to modify and compile the code (PSoC creator is freely available from Cypress semi).

Offline Intra

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Re: Next Gen DRSSTC
« Reply #124 on: November 21, 2020, 06:48:00 PM »
Netzpfuscher pointed at the place where the range can be changed - treat it as an opportunity to learn how to modify and compile the code (PSoC creator is freely available from Cypress semi).

My apologies.

Offline Intra

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Re: Next Gen DRSSTC
« Reply #125 on: December 04, 2020, 08:03:04 PM »
QCW MIDI is awesome :3


Offline pc50kd

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Re: Next Gen DRSSTC
« Reply #126 on: January 23, 2021, 02:35:18 PM »
A while ago I build a coil using the UD3 driver. Back then I used the pre-compiled firmware posted by Netzpfuscher.
The coil worked great except for the lead time compensation.

Recently I saw that the bug concerning the lead time compensation was fixed. So I updated my UD3 to the latest firmware.

After doing this the UD3 only communicates over the onboard USB connection. On the RX and TX pins for the UART connections I get no data at all.
I tried enabling and disabling the min protocol and various other settings but this made no difference. The board only communicates on 480600 baud with plain UART over the onboard USB connection.

Am I missing a new setting in the firmware or is there something else I might be doing wrong?

If someone could point me in the right direction it would be greatly appreciated.

Offline TMaxElectronics

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Re: Next Gen DRSSTC
« Reply #127 on: January 24, 2021, 10:13:16 PM »
I remember the UART pins accidentally being swapped in a previous firmware revision. Did you try reversing RX and TX?

Offline acobaugh

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Re: Next Gen DRSSTC
« Reply #128 on: January 25, 2021, 07:33:26 AM »
Looking to build one of these boards to swap in my big 8" coil to replace the existing UD2.7C. Does anyone have a kicad version of this board? I've been looking at https://github.com/Netzpfuscher/UD3_Kicad, but it looks like that project differs from the original Altium version, and without access to altium, I'm having a hard time figuring out what those differences are, and why. Any help is greatly appreciated!

Online Netzpfuscher

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Re: Next Gen DRSSTC
« Reply #129 on: January 25, 2021, 01:42:42 PM »
I never finished the Kicad version. Only the Altium Version is up to date. I initially worked on the Kicad to make the board 4 layer and integrated ethernet. But now with the Fibernet everything is obsolete.

There is at least a board importer in Kicad which on the first look works great.

Offline acobaugh

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Re: Next Gen DRSSTC
« Reply #130 on: February 08, 2021, 07:32:55 AM »
I tried the kicad importer a couple different ways. At least with the version I tried on Linux, it never quite got the board layout right. In the end I ended up grabbing a free trial version of altium designer, and figured it out just enough to generate PDFs and gerbers. Just to make sure before I place my order, https://github.com/Netzpfuscher/UD3_PCB is the right repo for the latest board?

What capacitors are we using for C1, C2, C36, C43, C46? The BOM just says "electrolytic capacitor."

What SFP modules are we using with the fibernet board? It looks like the lan9250 supports 100base-fx. Is it sensitive to vendors at all, or will just about any 100base-fx sfp module work? What are folks doing on the other end to hook up to a PC, just a media converter? Ethernet switch? Is the wire protocol used with the fibernet documented anywhere? Just curious.

Offline TMaxElectronics

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Re: Next Gen DRSSTC
« Reply #131 on: February 08, 2021, 01:41:07 PM »
The fibernet can work with any 100Base-Fx module. I have been using some used ones from ebay with no problem.
The others side just goes into a 100Base-Fx media converter, the fibernet supports DHCP and will get itself a unique Mac address from the ID bytes in the UD3.

The protocol used is MIN, but with some slight modifications. It transmits individual packets, which are converted into UDP. All data coming in on port 1337 is forwarded to the UD3 and all data it sends back gets sent to the last client that sent data to 1337.
There isn't really much more documentation about the thing at the moment...

The PCBs should be the most recent revision, I've ordered some of them from JLC and they came out fine, except for the little TC pcb art on the left having some weird rings over it. Shouldn't affect functionality though.

I can check those caps later.

Offline VEKTOR

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Re: Next Gen DRSSTC
« Reply #132 on: February 10, 2021, 09:22:59 PM »
Hello there

The PCBs should be the most recent revision, I've ordered some of them from JLC and they came out fine, except for the little TC pcb art on the left having some weird rings over it. Shouldn't affect functionality though.
I did the same as acobaugh, installed altium viewer, generated gerber files and quoted them at JLCPCB.
At least the online PCB viewer knows how to handle this files, so they shot be correct enough, i guess  :-\
BUT now comes the trap for young players (or maybe not), this files contain two different designs! The main driver board an the 4 gate PCBs.
So, when I understood this page correctly
https://jlcpcb.com//quote/pcbOrderFaq/Different%20Design%20in%20Panel?_ga=2.186550766.618861736.1612917287-1327371747.1609403369
they'll charge you extra for this, to be precise the price jumps from 2$ to 12.10$...
I would pay that but it's contra intuitive, to squeeze everything into 10x10cm and then have to pay much more compered to quoting two different PCBs, that would cost only 4$.

I guess you just made a quote for a single design (2$) and hoped that it slips through?

Offline Hydron

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Re: Next Gen DRSSTC
« Reply #133 on: February 10, 2021, 10:52:30 PM »
I think the $2 thing might just be for the first board design in an order, then it rises to 5 or something? Could be wrong about that, has been a while since I've ordered from them. Regardless, very cheap even when not at the $2 promo price.

I personally wouldn't complain too much about the JLC policy - they do actually tell you how to be a cheapskate at the bottom of the page!

Offline acobaugh

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Re: Next Gen DRSSTC
« Reply #134 on: February 11, 2021, 04:37:35 AM »
I actually managed to slog my way through altium long enough to modify the PCB to take out the gate drive boards, since I have my own design for CM300 half bridge modules. I can share the gerber files for that if you're interested.

JLC usually has some sort of deal for new users or new designs. I've been happy with them. And consider not too long ago we were still having to pay a premium for PCBs or etch them ourselves.

Offline TMaxElectronics

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Re: Next Gen DRSSTC
« Reply #135 on: February 11, 2021, 10:23:39 AM »
Though it might be a little sketchy, you can just say "the slots near the top are for HV isolation". They didn't require the multiple different designs charge when I did that.

Quote
I can share the gerber files for that if you're interested.
Sure contributions are always welcome :)
I think it would work best if you created a fork of the repo and added your files to a new branch, then people can just download that if they need it. (or you could just send them to me and I'll add then if you want :D)

Offline AeraCura_

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Re: Next Gen DRSSTC
« Reply #136 on: March 03, 2021, 11:15:32 PM »
Quote
I can share the gerber files for that if you're interested.

Wherever you decide to put the files let me know.

Offline acobaugh

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Re: Next Gen DRSSTC
« Reply #137 on: March 09, 2021, 05:46:17 AM »
As of this afternoon, I now have a fully assembled and flashed UD3. Booted it up and played around with the CLI a bit. This is going to be fun!

As far as gerber files - I can issue a PR if that would be helpful. That being said, I found about a dozen or so pads that weren't labeled in the silkscreen layer, so I had to go back and forth with Altium with a Viewer license to locate the right parts. If I had caught this sooner, I would have fixed it before my trial license expired. Sigh.

What I would like to do long term is put together a place with links to the different projects, guides, assembly/testing instructions, errata, etc. Preferably something collaborative. I'm tempted to just throw a page up on my personal site, which is done in markdown (using Hugo) and versioned on github. I'd happily accept PRs. Maybe I'll just do this on my own and see how far I get with creating actual content.

Offline acobaugh

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Re: Next Gen DRSSTC
« Reply #138 on: March 31, 2021, 11:05:34 PM »
I'm having problems using the serial line on my UD3. It started when I went to test the Fibernet board I received. The board was never initializing the ethernet port, so it seemed like it was never receiving the UD3 ID. Since then I've tried using just a simple usb to uart converter. Here's what I've observed:

* baudrate = 460800 for all tests
* ivo_uart doesn't seem to make any difference (that I could see)
* physically swapping RX/TX definitely has an effect. One way (RX->TX, TX->RX) causes the COMM light to blink when I type, the other way nothing happens
* min_enable = 1 causes garbage characters to be printed to the terminal every 1s, along with "min reset" alarms logged every 1s
* when typing in the terminal, I can see the COMM light blink.
* I get garbage characters at startup, and sometimes if I type fast enough I can get garbage characters back
* Teslaterm is unable to connect no matter what I try - plain serial or min serial
* USB CLI works just fine

All of these tests were done with both GNU screen, minicom, and the latest teslaterm with identical results.

This is with 54449c1728419ab4e3e3023d3c90874c25ec97e1 from master.

What I observed with the fibernet is this:

* with the firmware located here (https://github.com/Netzpfuscher/UD3/blob/master/common/binary/UARTldr/CY8C5868AXI-LP032.hex), the UD3 would boot, fibernet LED would be red. Right after boot, fibernet LED would go solid green
* after updating to (54449c1728419ab4e3e3023d3c90874c25ec97e1), fibernet LED would stay solid red

So, I'm at a loss. I don't do embedded systems, so I don't have much troubleshooting experience beyond the basics. Oh, and I killed my programmer over the weekend, so I need to wait for another devkit to show up

Online Netzpfuscher

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Re: Next Gen DRSSTC
« Reply #139 on: April 01, 2021, 09:10:08 AM »
- Baudrate 460800 is correct for Fibernet.
- ivo_uart needs to be set to 0
- RX-TX is swapped in the revision you tested (I forget to change this back, the first fibernet revision had false pinout) I fixed it: 5e215fe77a72e46d5eb83f55406cefff23c0661f
- min_enable needs to be set at 1... Then saved with eeprom save... then restart with reset... The "garbage" are binary min frames. The 1s min reset is correct until a client is connected
- blink of the com light is good
- with min_enable = 1 the "garbage" is a "hello computer I'm a starting UD3" frame ;)
- Teslaterm with a serial cable should connect with "min" and baudrate 460800 and the correct COM port
- USB-CLI is exactly for that reason, if the serial parameters are fucked up to configure the UD3

Quote
* with the firmware located here (https://github.com/Netzpfuscher/UD3/blob/master/common/binary/UARTldr/CY8C5868AXI-LP032.hex), the UD3 would boot, fibernet LED would be red. Right after boot, fibernet LED would go solid green

This is only a bootloader. I think I can compile you a actual complete binary and put it on the git release page today.

Quote
Oh, and I killed my programmer over the weekend, so I need to wait for another devkit to show up
If the bootloader is still on the board it can be recovered. I take a look if the bootloader pinout is correct. The binary is 13 months old, perhaps it is also from the pre fibernet time. But for updating the bootloader you need a programmer.

If you still have problems, I'm shure we can solve that over Zoom or Teams ;)



Edit (new binarys):
https://github.com/Netzpfuscher/UD3/releases/tag/2.1.0
« Last Edit: April 01, 2021, 12:41:34 PM by Netzpfuscher »

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Re: Next Gen DRSSTC
« Reply #139 on: April 01, 2021, 09:10:08 AM »

 


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