No current flowing through half bridge (kaizer sstc 3)

[prabhatkumar]

Hey there everyone . So I am on way building my first sstc from kaizer's site (sstc 3). So I had earlier started a new topic with gate drivers ICS dying ( Ucc37321) which seems to be now resolved . But now another issue popped up is that whenever I try to power the bridge side of my sstc there seems to be very little or almost no current which is constant (18mA) . There also seems to be a horrible oscillation (or ringing) . I will upload the waveforms here .
Please tell me why isn't there any current flowing even though I have like a 10 ohm resistive load on the output without the usual
DC blocking cap. My mosfets seems to be switching well but there seems to be nothing happening . Even if my change my load to 1 ohm , nothing changes and also there are quite a few spikes in the drain source voltage which indicates very less current flowing. I am powering my driver circuit with a 12 volt battery . I am powering the bridge with a 18 volt transformer with a bridge rectifier. Is it beacuse my gate voltage is around 10.7 volt and not 12 volt ??
Waveforms :
Green is drain and source voltage , yellow is gate and source

Green is current though gdt measured with a series resistor of 2.7 ohm.yellow is gate source voltage .

Green is current through gdt and yellow is drain source voltage

[John123]

Can you draw more than 18 mA from the power supply connected to the bridge?

Definitely no bad solder joints or things shorting out on the bridge side? Maybe one of the traces has hairline broken in a really hard to see place? 18mA sounds an awful lot like capacitive coupling with no direct connection.

Remember the tabs of the switching devices are internally connected so they could be a place for the flying wires of the gate drive transformer to touch and short to (including the mur diodes).

Can you measure the capacitance of the rail splitting capacitors? Sometimes bending the leads too much to make them fit can fracture them internally.

Might be an idea to tin the bridge traces just incase (flux pen will help here), then get a flat blade screwdriver or some other tool and scrape the areas between traces to remove any dirt or debris that could be between them.

[davekni]

I'm confused by the current question.  The first scope plot shows ~20V square wave on the half-bridge output.  If you are loading it with 10 ohms, that's 2 amps.  What measurement is making you conclude that you have little half-bridge output current?

I'd also recommend not probing gate drive current.  Gate drive voltage is more important.  Gate drive current will be an issue only if it gets large enough to trigger logic transitions due to the problematic ground resistors on the gate driver chips.  Especially when searching for ringing sources, the extra load (parasitic capacitance and inductance) of the scope "ground" lead on the gate drive waveform will likely disturb measured waveforms.

[prabhatkumar]

I'm confused by the current question.  The first scope plot shows ~20V square wave on the half-bridge output.  If you are loading it with 10 ohms, that's 2 amps.  What measurement is making you conclude that you have little half-bridge output current?

I'd also recommend not probing gate drive current.  Gate drive voltage is more important.  Gate drive current will be an issue only if it gets large enough to trigger logic transitions due to the problematic ground resistors on the gate driver chips.  Especially when searching for ringing sources, the extra load (parasitic capacitance and inductance) of the scope "ground" lead on the gate drive waveform will likely disturb measured waveforms.

The thing is that observed that the mosfets don't get hot at all while while switching and also the fact that the spikes are still there after attaching a heavy load even though they should have decreased . And also to measure the current what I did was that I took a normal multimeter and put it in series to the power supply supplying the bridge so that shows very less current of 18mA . Even though thoeritcally it it should have drawn couple of amps.
Edit : I have resolved the issue and it turned out to be some bad film caps for the voltage splitting in the half bridge. I guess I have to check before using salvaged parts in any project .

[davekni]

Great to read that you solved the half-bridge current issue.

[prabhatkumar]

Thanks for everyone's guidance. I would really appreciate if anyone of you all could link any post on this forum about tuning the coil i.e I am not able to run the coil solely on the driver beacuse I think I am not getting feedback . I tried reversing the phase of the primary but still I don't what it isn't happening.

[davekni]

Since this is a SSTC, there's only one resonant frequency, so there's no tuning to do.  The issue is likely with startup.  If the DC blocking caps in the half-bridge output circuit (150nF C8 and C9 in Kaiser SSTC III Bridge) are already charged to one supply rail voltage, and the initial state of the HC14 is the same polarity, then the enable pulse into the gate drivers has no effect.

My favorite solution isn't very popular here.  That's to make the feedback self-oscillating.  Add a high-value (~1meg) resistor across the first HC14 inverter (from antenna to output of that inverter, pins 1 and 2 of U2 in Kaiser SSTC III driver).  That makes the bridge toggle when enabled even without feedback.  Once there's some antenna signal, that swamps the current from the 1meg resistor, so the circuit works as intended.

I think the more common solution here is to add bleed resistors across the DC blocking capacitors C8 and C9.  This forces the center voltage to half of the rail voltage between enable pulses.  That way there's always some half-bridge output on the initial enable edge no matter which state the HC14 output may be.

I think you are using CD40106B instead of HC14.  CD40106B is quite a bit slower, 140ns typical at 5V.  The two inverter stages will add 280ns typical delay (phase lag).  That is likely not too critical.

[prabhatkumar]

Hey davekni thanks for the reply I will try your solution. But please could you explain like how actually the oscillation starts and then how adding resistors across c8 and c9 will help . I am newbie after all so I don't understand a lot.

[davekni]

When the driver circuit is idle (driver chip enable inputs are low), both half-bridge FETs (Q1 and Q2) are off.  The half-bridge output (Q1 source and Q2 drain) will be floating, so may be anywhere between 0V and 170V (or whatever voltage is across the bulk cap C12).  The logic state of the inverter U2-2 may be either 0V or 5V depending on random differences in leakage currents of D1 and D2.

On the rising edge of enable (U3-3 and U4-3), either Q1 or Q2 will turn on, depending on whether U2-2 happens to be high (5V) or low (0V).  Let's consider the case when Q1 turns on.  That pulls its source high (pulls the left side of the primary coil high - to 170V if running from 120VAC).  If it had been lower to start (if C9 had less than 170V), there's now voltage across the primary coil.  To start up, that primary voltage must be enough to cause enough secondary voltage to couple into the antenna, changing the voltage on U2-1 and thereby switch the state of U2-2.  The state change on U2 causes Q1 to turn off and Q2 turn on, reversing the primary coil voltage, inducing a secondary voltage reversal which couples to the antenna and switches Q2-2 back to it's initial state.  This reversal continues - that's the intended operation.

However, suppose the voltage across C9 had been close to 170V initially.  Then there's little initial primary coil voltage, not enough to couple to the secondary then to the antenna and to U2.  So, nothing happens.

With resistors across C8 and C9, the voltage will be close to half, 85V in this example.  That makes an 85V initial primary winding voltage step when enable goes true.  As long as 85V is sufficient to couple through secondary to antenna and switch U2, everything starts up properly.  The resistors need to be low-enough value to center the C8/9 voltage between the end of one enable pulse and the start of the next enable pulse.  They need to handle the power of 85V across each one.

My preferred alternative is to add a >=1meg resistor from U2-1 to U2-2.  That makes U2-2 toggle continuously even when the driver chips are not enabled.  If the initial enable rising edge doesn't create enough voltage to start oscillation (ie. if C9 is close to 170V), then the next U2-2 edge will switch Q2 on, making a full 170V step on the primary coil.  That 170V step should be enough to start oscillation.

Of course, all the 85V/170V is based on line voltage.  Scale to your line voltage.

If this doesn't quite make sense yet, please ask again.

[prabhatkumar]

Thanks a lot davekni !! Well I hate to say this but I guess my ucc aren't working as they should . Because mads schematic was configured to output somewhere around 4 hz and 14 % duty cycle from the ne555 depending upon the position of the pot,( I hope that my ne555 frequency and duty cycle are correct ) but then the ucc simply don't react to the enable pin input . Even if I completely removed the ne555 front the board i.e no signal on the enable pin , ucc still keeps one working as normal . I don't know what's going on there . If you know then please let me also the cause and solution !!

[davekni]

On the Kaizer schematic, the 555 circuit uses a triangle ground symbol for the node connected to U5-1.  The rest of the circuit shows wire connections to a connector input labeled "GROUND".  I'm assuming you have those two grounds connected together, as they must be for it to function.  The schematic isn't clear that those two grounds must be connected.

Could you share a scope trace of the enable pins (U4-3 or U3-3) and the driver outputs (U4-6/7 and U3-6/7)?  Ideally trigger the scope on the rising edge of enable to see what should be the startup conditions.

[prabhatkumar]

Ok I will do that definitely and upload the waveforms by tomorrow. And yes both the grounds are connected to the ground of the driver circuit itself . This could well answered by mads himself as he only designed the PCB which I am using now .
Is there any way in which I could check my ucc chips for the enable function without putting it in the PCB ??

[davekni]

It's unlikely that a driver chip would function except for the enable input.  Enable is pin 3, so not a corner pin, so not a likely candidate for receiving an ESD event during handling.  That's one reason I asked for the scope plots - I suspect the issue is something other than driver chips ignoring enable.

[prabhatkumar]

Also can you cross check that what should be the output of the ne555 according to the mads schematic . I will upload the ne555 output now and put the output of ucc and enable by tomorrow as some of the setup made is dismantled right now and I will assemble it tomorrow.
EDIT: I am posting the new waveform as requested by davekni. The outputs of the ucc simply dont change it seems it simply is ignoring the ENABLE inputs I dont know why.. Please tell me why is this happening. GREEN is the ENABLE AND YELLOW is the output of the schmitt trigger.
Also if this method fails can I add an AND gate after the interuppter and the outputs of the schmitt trigger and then feed it in the signal pin (PIN2 )of the UCC.
Also just for testing purposes could I just replace the feedback part ( or override it ) by my function generator set around the resonating frequency of the coil. I asked this to know if the phasing of the primary is correct or not

[davekni]

Do I understand correctly that the green trace is the enable signal on U3-3 and U4-3, and that the yellow trace is the input signal on U3-2 and U4-2 (which comes from inverter pin U2-4)?  When you say the UCC outputs aren't changing, are they both low (U3-6,7 and U4-6,7)?  If that's all true, then the UCC chips aren't functioning.  If the outputs remain static when enable is high and the input is toggling, then there's no gating or other changes that would fix non-functional UCC chips.

[prabhatkumar]

I am sorry davekni , I meant the output of the ucc instead of "OUTPUT OF THE SCHMITT TRIGGER". And yes that is observation made by the oscilloscope that the output waveform doesn't react at all to the UCC Input. And now for initial test or so called first light of the tesla coil , What other things do i need to do apart from adding a  1 mega ohm resistor at pins 1 and 2 of the schmitt trigger. Also i will be powering the bridge with 30 volts for first test and then ramp it up to 60 v. That day when i tried to power the tesla coil , it didn't work at all and when i touched the antenna immediately the power supply went in to the current limiting mode and one of my mosfets also got super hot and shorted.(GATE to SOURCE voltage drop measured 0.002 volts so yeah it shorted for sure). I also dont know what happened suddenly when i touched the antennae , please could you explain this to me.

[davekni]

I'm wondering if there's a cold solder joint in the enable signal path.  Have you tried probing on the U3-3 and U4-3 pins themselves, up where the pin enters the epoxy package molding?  Or, use an ohm-meter to check continuity between U3-3 and U2-4, with both probes up on the IC package adjacent the black epoxy.  The UCC parts have an internal pull-up resistor on enable, so a disconnected pin will behave as enabled as you are seeing.  My only other thought for such behavior is that the U3-3 and U4-3 experienced some mechanical stress that broke the wire bonds inside the chips.  That seems unlikely - usually requires aggressive bending of pins during desoldering and resoldering of parts.

Adding the 1-2meg resistor across U2-1 to U2-2 should allow continuous operation with enable behaving as permanently true.  Low bus voltage is a good idea for such continuous running.  If you know your secondary resonant frequency at least roughly, it's ideal to have the self-oscillation frequency from the added resistor match the resonant frequency.  You could adjust the resistor value to get that result, lower resistance for higher frequency.  It's better not to get the self-oscillation frequency higher than resonance, so err on the low side.  The 1-2meg will likely be on the low side - why I suggested that range.  Have the antenna attached for this adjustment, but no bus voltage.

Until the UCC enable issue is fixed, you will be limited to continuous operation.  It would be possible to patch with gates, but that's quite a nuisance.  One driver chip is inverting, so needs to have its input pulled high for disable.  The other is non-inverting, so needs to have its input pulled low for disable.  Hopefully it's just a bad solder joint and can be easily fixed.

It's difficult to guess what happened when you touched the antenna, and what signals your body was injecting into U2-1.  In many situations, the dominant signal from a person touching a scope probe is line-frequency, 50 or 60Hz.  Low-frequency switching will generate 24V gate voltage pulses because C4 will charge to 12V then to -12V.  The FETs are probably specified for 20V maximum Vgs, but not likely to fry at 24V.  If the signal injected from your body happened to hit the series-resonance of C4 with the gate-drive transformer, then even higher gate voltages could be generated.

[prabhatkumar]

Hey davekni thanks for the reply !! Well I am sad to say this but then I guess my ucc chips don't work as per the expectations . I checked the continuity from pin 3 of ne555 to pin 3 of the ucc ( enable ) . There seems to be a zero resistance path as it should be till the legs just outside the epoxy package so definitely not a cold solder joint. And also could elaborate on the tuning of resistor for the startup purpose. And yeah now I understand the mess behind the logic gate  enable thing. Thanks !!

[davekni]

Agreed, you must have bad UUC chips   That's an unusual failure, not the typical fried output stage from overload.

For the resistor addition to make it self-oscillating, try searching for "schmitt trigger oscillator".  Here's one good page:
http://electronics-course.com/schmitt-trigger-oscillator

For this driver, the input-to-ground capacitor is just the parasitic capacitance of the input (U2-1) and the parts connected to it, the two clamp diodes (D1 and D2), and the antenna's capacitance.  The added resistor from U2-1 to U2-2 controls how fast the capacitance is charged and discharged.  If the added resistor is large, the frequency will be low, as the input capacitance will be charged and discharged slowly by the low current.  A smaller resistance will charge and discharge the capacitance faster, resulting in a higher frequency.

If this self-oscillation frequency is close to resonance, then the Tesla coil secondary will build amplitude for several cycles before getting too far out-of-phase.  That provides more amplitude for the antenna to pick up, so makes startup more certain.

[prabhatkumar]

Thanks for the explanation davekni !! When I plug my values of the self resonance frequency of my Tesla coil (240khz) and my capacitor which is 0.1 uF fixed from mads schematic
 , I get a value of R to be 33.3 ohm. So am I doing something wrong here ??