Author Topic: Small SSTC killing gate drivers  (Read 1722 times)

Offline Lucasww

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Small SSTC killing gate drivers
« on: December 07, 2023, 11:34:00 PM »
I'm building another small tesla coil, This time with the typical SSTC circuit. I decided to use the newer UCC27524 chips instead of UCC27321 usually used, as they're faster, can handle higher voltage and the 27321 is at its end of life.
Testing at low voltages it works great, gate drive waveforms look pretty much perfect, but as I raise the bridge voltage higher it starts killing chips. I lowered the supply to the chips from 18V down to 15V and they stopped dying, but if I raise the voltage further to over 100v they start dying again. Ive never had this issue with 27321s so I have no clue what's wrong.
Here's how it's wired:


(10u ceramics on the side of the chips, 1u SMD ceramics are on the bottom of the board)

The datasheet is here: https://www.ti.com/lit/ds/symlink/ucc27524.pdf?HQS=dis-mous-null-mousermode-dsf-pf-null-wwe&ts=1701923350644&ref_url=https%253A%252F%252Fwww.mouser.kr%252F

I'm using UJ4C075033K3S SiCFETs so the gate capacitance shouldn't be an issue. They have 10 ohm gate resistiors and a reverse diode for fast discharge.

I added a ferrite ring to the input of the GDT to hopefully block interference, but I'm out of 27524 chips so I can't test if that helped yet.

My current thoughts are that this is the issue, the chips can supposedly not handle a spike on the output voltage of more than vcc+0.3v
« Last Edit: December 07, 2023, 11:39:22 PM by Lucasww »

Offline davekni

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Re: Small SSTC killing gate drivers
« Reply #1 on: December 08, 2023, 08:55:43 PM »
Quote
I'm using UJ4C075033K3S SiCFETs so the gate capacitance shouldn't be an issue.
What is your coil oscillating frequency?  What enable duty cycle (on time and off time)?  Even with SiC FETs, if frequency and duty cycle are both high enough, driver chip power dissipation could be an issue.

My only other guess is IC socket inductance.  Layout looks good.  But placing fast high-current chips in sockets leads to large internal IC ground and power voltage spikes.
David Knierim

Offline Lucasww

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Re: Small SSTC killing gate drivers
« Reply #2 on: December 09, 2023, 01:25:03 AM »
Coil was running at ~400kHz, with very low duty cycle (a few milliseconds and like 2 BPS for testing). no noticeable heating in the gate drivers before they died.

When my new chips arrive I will try scoping the pins during operation to see if theres any weird voltage spikes.

Offline davekni

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Re: Small SSTC killing gate drivers
« Reply #3 on: December 09, 2023, 02:11:48 AM »
Quote
Coil was running at ~400kHz, with very low duty cycle (a few milliseconds and like 2 BPS for testing). no noticeable heating in the gate drivers before they died.
Agree.  Event transient driver chip driver temperature should be plenty low.

Quote
When my new chips arrive I will try scoping the pins during operation to see if theres any weird voltage spikes.
In particular look at ground pin at chip.  Look for very short spikes or ring at high-to-low transitions of output.  Good to check power pin too, but that is less likely to be a problem.

Quote
I added a ferrite ring to the input of the GDT to hopefully block interference, but I'm out of 27524 chips so I can't test if that helped yet.
The most useful place for a common-mode choke (ferrite ring) may be on the high-side output.  That winding experiences by far the most rapid and highest voltage swing.  If you have another ferrite ring, I'd add that to high-side output, ideally with 3 or 4 turns of the twisted-pair secondary output leads.
« Last Edit: December 09, 2023, 03:17:44 AM by davekni »
David Knierim

Offline Lucasww

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Re: Small SSTC killing gate drivers
« Reply #4 on: December 09, 2023, 08:57:15 AM »
Quote
In particular look at ground pin at chip.  Look for very short spikes or ring at high-to-low transitions of output.  Good to check power pin too, but that is less likely to be a problem.
What should I be measuring it to? between the ground plane and the ground pin on the chip?

Quote
The most useful place for a common-mode choke (ferrite ring) may be on the high-side output.  That winding experiences by far the most rapid and highest voltage swing.  If you have another ferrite ring, I'd add that to high-side output, ideally with 3 or 4 turns of the twisted-pair secondary output leads.

I have a few of these: https://www.digikey.com/en/products/detail/epcos-tdk-electronics/B64290L0044X049/3913505
Would these be good for common mode filtering? I currently just have the primary wires running through a random small green ferrite ring a single time. do I need more turns?

Offline davekni

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Re: Small SSTC killing gate drivers
« Reply #5 on: December 09, 2023, 09:03:11 PM »
Quote
What should I be measuring it to? between the ground plane and the ground pin on the chip?
Yes.  Contact pin where it inters epoxy chip package.  Measurement will be most accurate if scope probe ground connection is short, such as from ground ring around tip to ground at adjacent bypass capacitor lead (or scrape away solder resist from a local section of ground plane).

Quote
I have a few of these: https://www.digikey.com/en/products/detail/epcos-tdk-electronics/B64290L0044X049/3913505
Would these be good for common mode filtering?
A higher permeability material would be better, but anything is useful.

Quote
I currently just have the primary wires running through a random small green ferrite ring a single time. do I need more turns?
If you are certain it is ferrite and not powdered iron, then it will be of some value.  Inductance increases proportional to turns squared.  4 turns is 16x higher inductance.  Even with low permeability core, 4 turns is better than 1 turn (pass through) of the highest permeability option for that core size (which is 8x permeability of the core you linked to).

BTW, I've had issues before driving FET bridges with GDTs until adding high-side common mode chokes.  However, the issues I had were FETs frying rather than driver frying.  I don't know if your issue will be improved with common mode chokes.  Little downside to adding them.
David Knierim

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Re: Small SSTC killing gate drivers
« Reply #5 on: December 09, 2023, 09:03:11 PM »

 


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