RDRSSTC - Project Build

[ZakW]

Hello,

While I am still wrapping up my RSSTC I'd like to start planning my next build. For that I want to step up to DRSSTC territory. I want this to be a ramped coil as well that will hopefully help prepare me for a QCWDRSSTC in the future.


High level plan:

• 120v AC input
• Full bridge using FGH75T65SHD https://www.mouser.com/ProductDetail/512-FGH75T65SHD_F155
• UD1.3 driver (modified)
• 360-450kHz operation

My aim is a compact design with the best secondary to arc length ratio.


Driver Questions:

• Considering the UD1.3b, how crucial is phase lead? I've noticed it in later UD versions. Should I integrate it into UD1.3? https://kaizerpowerelectronics.dk/files/stevehv.4hv.org_files/universal_driver_1.3b/DRSSTC_pndriver1_3b.pdf
• For a more compact RDRSSTC, would driving the IGBTs at around 18-20v vs. the UCC27423's 15v max make a significant difference, considering the improvement in current capabilities?
• Can I bypass the push/pull MOSFET output stage and simply use two UCC27423s, given that a single UCC27425 was adequate for my half bridge RSSTC?
• Are there notable differences between regular and ramped DRSSTCs in terms of component stress and operation, aside from the arc appearance?

Thank you!
 

[Lucasww]

Phase lead will be very helpful if you are planning to run long on-times, which you will be doing with a ramped coil.

With 15v input on your GDT, assuming 1:1 turns ratio, you will realistically be able to get 13-14v consistently on your igbt gates. The FGH75T65SHD datasheet shows that they should be fine at that voltage. However, what concerns me more is the possibility of ringing on your gates causing the voltage to drop potentially below 10v, which could easily cause desaturation. This isn't as much of an issue with the typical 18-24v gate drive most use. I'm using FGH75T65SHD in my QCWDRSSTC and have had no issues driving them at 19v.

Whether or not you can bypass the output mosfets is really up to what gate drive voltage you want. If you want the voltage to be above 15v, you will either need the mosfets, or a higher voltage gate drive chip. Most higher voltage chips with suitable rise times and propagation delays are SMD and quite small, so you may have trouble keeping them cool. I would recommend just using the mosfets.

As far as operation and component stress, You will generally want higher coupling, and a higher impedance primary circuit. The stress on your components ultimately depends on tuning, current and on-time. Properly tuned phase lead will greatly reduce switching stress, especially with long on-time.

[ZakW]

Hello Lucasww, I appreciate the insight!

Phase lead will be very helpful if you are planning to run long on-times, which you will be doing with a ramped coil.

Thank you for confirming that. I will see about adding it. I assume I can copy the phase lead portion from the UD2.7 into the UD1.3?

I would like to build the UD1.3 from scratch, is that typically not advised? It would be a good chunk of work but give me a lot of experience using PCB software, I have an okay foundation. Ideally, I would have the whole DRSSTC on one PCB or at most two. Similar to Loneoceans full bridge SSTC build on a single PCB.

With 15v input on your GDT, assuming 1:1 turns ratio, you will realistically be able to get 13-14v consistently on your igbt gates. The FGH75T65SHD datasheet shows that they should be fine at that voltage. However, what concerns me more is the possibility of ringing on your gates causing the voltage to drop potentially below 10v, which could easily cause desaturation. This isn't as much of an issue with the typical 18-24v gate drive most use. I'm using FGH75T65SHD in my QCWDRSSTC and have had no issues driving them at 19v.

Looking back on some scope captures of my gate drive signal from my SSTC using a UCC27425 at 15V Vcc I was getting 15.6-16V on the gate. I used a commercial 1:1 GDT.  Not quite as low as you mentioned but it sounds like a good idea to include the push/pull stage to achieve a higher gate drive voltage. I will aim for 18v or so.

As far as operation and component stress, You will generally want higher coupling, and a higher impedance primary circuit. The stress on your components ultimately depends on tuning, current and on-time. Properly tuned phase lead will greatly reduce switching stress, especially with long on-time.

I have read that higher coupling and impedance is beneficial. Is a higher impedance achieved by more primary turns and a smaller resonant capacitor?

Good to hear that phase lead is so effective!


Thanks again!

[Lucasww]

I would like to build the UD1.3 from scratch, is that typically not advised? It would be a good chunk of work but give me a lot of experience using PCB software, I have an okay foundation. Ideally, I would have the whole DRSSTC on one PCB or at most two. Similar to Loneoceans full bridge SSTC build on a single PCB.

Building a board from scratch is fine, although it is quite a bit more work, as you mentioned. make sure you use large ground planes to help avoid interference, which is an issue when driving tesla coils.

Looking back on some scope captures of my gate drive signal from my SSTC using a UCC27425 at 15V Vcc I was getting 15.6-16V on the gate. I used a commercial 1:1 GDT.  Not quite as low as you mentioned but it sounds like a good idea to include the push/pull stage to achieve a higher gate drive voltage. I will aim for 18v or so.

Interesting that you got higher voltages on the gate than you have on the input. Still, the mosfet push/pull buffer is a good idea. 18v should be perfectly fine.

I have read that higher coupling and impedance is beneficial. Is a higher impedance achieved by more primary turns and a smaller resonant capacitor?

Yes. For QCW coils with >20ms on-time people usually use 7-15nF capacitance, and whatever inductance gives the right frequency. For a mains-ramped coil, your ontime will be probably under 5ms, so slightly more capacitance may be good to get a bit more current. Maybe somewhere around 20-30nF. Typical DRSSTCs use much higher capacitances like 100-500nF

[Mads Barnkob]

Looking back on some scope captures of my gate drive signal from my SSTC using a UCC27425 at 15V Vcc I was getting 15.6-16V on the gate. I used a commercial 1:1 GDT.  Not quite as low as you mentioned but it sounds like a good idea to include the push/pull stage to achieve a higher gate drive voltage. I will aim for 18v or so.

Interesting that you got higher voltages on the gate than you have on the input. Still, the mosfet push/pull buffer is a good idea. 18v should be perfectly fine.

A high voltage could indicate that you have ringing being rectified or your measurements are not fast enough to capture the ringing.

Why not drive the gates even harder, if you are worried about switching losses? Usually 24VDC is used in the UD1.x/UD2.x drivers. Limiting gate voltage in commercial applications is a way to limit the C-E maximum current, we are beyond trying to nurse our IGBTs like that.

[ZakW]

Building a board from scratch is fine, although it is quite a bit more work, as you mentioned. make sure you use large ground planes to help avoid interference, which is an issue when driving tesla coils.

I already started, much more complicated than my last SSTC. Going to be a lot of work.

Yes. For QCW coils with >20ms on-time people usually use 7-15nF capacitance, and whatever inductance gives the right frequency. For a mains-ramped coil, your ontime will be probably under 5ms, so slightly more capacitance may be good to get a bit more current. Maybe somewhere around 20-30nF. Typical DRSSTCs use much higher capacitances like 100-500nF

Good to know, I will keep this in mind!

A high voltage could indicate that you have ringing being rectified or your measurements are not fast enough to capture the ringing.

Interesting that you got higher voltages on the gate than you have on the input. Still, the mosfet push/pull buffer is a good idea. 18v should be perfectly fine.

Regarding the higher gate voltage. I attached a picture of my SSTC gate waveform. It is at 15.6V so probably a little bit of ringing, other than that I think it looks great.

Why not drive the gates even harder, if you are worried about switching losses? Usually 24VDC is used in the UD1.x/UD2.x drivers. Limiting gate voltage in commercial applications is a way to limit the C-E maximum current, we are beyond trying to nurse our IGBTs like that.

Haha great point, Mads! I was planning on driving them at a higher voltage but just never landed on a value. I agree though, no real point in going easy on them given how they are being used.

[Lucasww]

Waveforms look great. You might be able to get away with slightly less gate resistance for faster transitions, but it's probably perfectly good as is, especially if you decide to raise the voltage

[ZakW]

Waveforms look great. You might be able to get away with slightly less gate resistance for faster transitions, but it's probably perfectly good as is, especially if you decide to raise the voltage

Thank you. Just to clarify that scope capture was the gate drive from my Ramped SSTC that I was referencing when looking at potentially excluding the push/pull buffer stage from the UD1.3.

For a coil like this, providing a higher gate drive voltage seems to be the best way to go. I will be sure to include the push/pull buffer so I can increase the voltage.