First drsstc issues

[AstRii]

But what if the the system is tuned and signal generator is used to produce sine waves having frequency of the primary?

That's never going to happen, as the primary frequency keeps ever so slightly changing with environment and load.

[davekni]

There is gdt output during the startup pulses, but its just that the bridge is not working at those pulses.

Sorry, I misread, thinking GDT rather than CT.  No CT output is what resistor is intended to fix.  Perhaps one or more of the IGBTs his high leakage current, more than 100k can overcome.  Measure bridge output voltage with a DMM while idle.  Ideally should be 0V.

If IGBT leakage current is the issue and more than 100k can fix, another option to fix:  Swap GDT primary leads.  Then opposite IGBTs will turn on during startup pulse, now the non-leaky IGBTs.  That should make a CT response.  If polarity is wrong, reverse CT leads to fix polarity.  (This fix presumes the same IGBT continues to have high leakage current, but that may be likely.)

[Hari33]

Hi, thanks for all the guidance.
I was able to get feedback today!!. The issue solved when i used a 1:50 feedback ct instead of 1:500 ct.
I am planning to keep ocd at 300amps so the feedback current is going to be around 6 amps, which if i am right is way above what 1.3b driver can handle.
Is there any way to tackle this?, or is it a feedback ct issue at all?is there anything else i should be concerned about?.

[Mads Barnkob]

But what if the the system is tuned and signal generator is used to produce sine waves having frequency of the primary?

That's never going to happen, as the primary frequency keeps ever so slightly changing with environment and load.

This happens

[davekni]

I was able to get feedback today!!. The issue solved when i used a 1:50 feedback ct instead of 1:500 ct.
I am planning to keep ocd at 300amps so the feedback current is going to be around 6 amps, which if i am right is way above what 1.3b driver can handle.
Is there any way to tackle this?, or is it a feedback ct issue at all?is there anything else i should be concerned about?.

You might get away with 50:1 if duty cycle is low enough and R4 is changed from 10 ohms to 0.5 ohm power resistor.
I'd recommend instead figuring out why 500:1 is failing.

Are you bypassing OCD now?   If so, how?  Is your OCD CT in the primary circuit with output unconnected?  That could be the cause of your startup issues.  Unconnected CT secondaries need to be shorted.

[Hari33]

But what if the the system is tuned and signal generator is used to produce sine waves having frequency of the primary?

That's never going to happen, as the primary frequency keeps ever so slightly changing with environment and load.

This happens

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I wasnt aware about how running drsstc using signal generator leads to hard switching😅.
Its clear now🙌.

[Hari33]

I was able to get feedback today!!. The issue solved when i used a 1:50 feedback ct instead of 1:500 ct.
I am planning to keep ocd at 300amps so the feedback current is going to be around 6 amps, which if i am right is way above what 1.3b driver can handle.
Is there any way to tackle this?, or is it a feedback ct issue at all?is there anything else i should be concerned about?.

You might get away with 50:1 if duty cycle is low enough and R4 is changed from 10 ohms to 0.5 ohm power resistor.
I'd recommend instead figuring out why 500:1 is failing.

Are you bypassing OCD now?   If so, how?  Is your OCD CT in the primary circuit with output unconnected?  That could be the cause of your startup issues.  Unconnected CT secondaries need to be shorted.

All the unused ct's were shorted👍.
I tried using a 1:100 ct, but the start up oscillations are only having an amplitude of 1 volts max, and its not increasing even with a bus voltage of 100V.
What all could be the reasons for such a weak feedback signal?

[Hari33]

I tried scoping the igbt gates today.
The gate signals at the time of interrupter pulses are very low, in the range of millivolts.
When i gave feedback input from a signal generator without any voltage on bus,the gate signals are good.

Is this the reason for low feedback signal?


I am not sure about the gdt core material.
Dimensions are
34mm outer dia
22mm inner dia
12mm width
7 turns.

Gate resistance is 5 ohms.

Attaching the pics of waveforms with this

[Mads Barnkob]

I tried scoping the igbt gates today.
The gate signals at the time of interrupter pulses are very low, in the range of millivolts.
When i gave feedback input from a signal generator without any voltage on bus,the gate signals are good.

Is this the reason for low feedback signal?


I am not sure about the gdt core material.
Dimensions are
34mm outer dia
22mm inner dia
12mm width
7 turns.

Gate resistance is 5 ohms.

Attaching the pics of waveforms with this

Feedback signal is needed for it to run. IC2C and IC2D are AND-gates which combines feedback and interrupter signal, to the gate driver ICs. This AND-gate is what insures ZCS and prevents hard switching as when you ran it with signal generator, this feedback needs to come from the primary LC circuit.

https://kaizerpowerelectronics.dk/tesla-coils/universal-driver-1-3b/

[Hari33]

Okay,got it👍.
Shouldnt the gate startup pulses at igbt gates have the same amplitude of gate drive voltage?
In my case those pulses are very weak.
Is this normal?

Used 18v zener diodes for gate protection.

[davekni]

Shouldnt the gate startup pulses at igbt gates have the same amplitude of gate drive voltage?
In my case those pulses are very weak.
Is this normal?

Yes, start amplitude should be same as run amplitude, one Vge at +18V and other at -18V.  Low amplitude is not normal.
My guess is that your driver chip is the wrong part, not inverting.  Should be UCC27423, not UCC27424.
Either that or 74HC08 is inverting (74HC00), but I think that would cause other issues too.
Measure voltage of driver chip outputs when idle (not enabled).  They should be +9V.

[Hari33]

Shouldnt the gate startup pulses at igbt gates have the same amplitude of gate drive voltage?
In my case those pulses are very weak.
Is this normal?

Yes, start amplitude should be same as run amplitude, one Vge at +18V and other at -18V.  Low amplitude is not normal.
My guess is that your driver chip is the wrong part, not inverting.  Should be UCC27423, not UCC27424.
Either that or 74HC08 is inverting (74HC00), but I think that would cause other issues too.
Measure voltage of driver chip outputs when idle (not enabled).  They should be +9V.

Hi, i am using TC4427 instead of UCC27423.
Mosfets are irf540 and 9540.
When i connect sg to the feedback, everything works well.
Then the outputs of driver IC is inverting too (i scoped them).

It looks like the bridge is not working well for the startup pulse from interrupter.The whole thing is working well when there is a x frequency pulses at the gates(when sg is connected to feedback input).

[davekni]

Hi, i am using TC4427 instead of UCC27423.

Scope through driver as I'd suggested in reply #16.  Given your scope capture of Vge startup pulse missing, the issue is in the driver.  (Hint:  TC4427 data sheet says it is non-inverting.  I think you need to scope carefully input and output of every chip and FETs on driver path from enable to GDT primary leads.)