Help Tuning Class E Tesla Coil

[Benjamin_collier]

I've been working on this class E Tesla coil based on Steve Ward's design..
It works decently considering im only giving it 15V right now as I want to tune it before I increase the voltage so I can avoid mosfet and driver casualties. The issue is I am having a hard time tuning it properly. I am trying to follow the advice on steve wards website and get nice waveforms  (yellow = gate voltage purple = Vds)..

From following the advice on the website it seems I need more primary inductance however when I do that the performance is much worse; I have settled on around 2.5 turns for the primary.

Here is my build.

I am aware that the string of capacitors and the breadboard are likely affecting my performance due to large parasitics but I want to dial it in before I put it on a protoboard or a PCB.

Any advice would be appreciated.

[davekni]

I am aware that the string of capacitors and the breadboard are likely affecting my performance due to large parasitics but I want to dial it in before I put it on a protoboard or a PCB.

Unfortunately, I believe parasitics are causing too much trouble to allow reasonable tuning.  With a couple changes, you can likely make a breadboard build that works well enough for tuning.

First, for all power circuits such as Tesla coils, it is important to keep high-current connections separate from control signals, including FET gate drive.  In particular, primary B+ lead needs to go to B+ bypass caps away from control circuitry, directly at FET.  In other words, FET drain to primary winding to bypass caps to FET source needs to be wired separately from FET gate and control circuitry.  A separate wire from FET source is needed to connect to control electronics.  Best to twist that source wire with gate wire (twisted pair) as Steve did in his build.

Second, specific to class-E, resonant cap(s) need to have low inductance and be soldered directly to FET source and drain.  Again, see Steve Ward's build page and image.  Series-connected caps are not good.  Inductance will be too high.  Parallel is OK.  I can't quite tell in Steve's picture if there is one cap or two in parallel, one under the other.  Either way, they are soldered directly to the FET with minimal lead length.  (Reason for this is that class-E circuits have very rapid transfer of current from FET to resonant capacitor(s) as FET is turned off.  This becomes high dI/dt, so creates high voltage across any parasitic inductance between FET and caps.)

After you make above changes, yes, likely will need either higher primary coil inductance or higher capacitance.

Couple less-important thoughts.  Vgs scope capture shows ~7.5V if I'm interpreting correctly.  Is your 12V supply sagging to 8V or so?  Or perhaps it is an issue with primary coil current returning through control electronics causing low Vgs.  If so, above changes will fix that.  Also, coupling between primary and secondary coils looks rather low based on your image.  You may want to play with JavaTC.  That and an analog simulation program would allow tuning by computer simulation as a pre-step to actual testing.  (My favorite free analog simulator is LTSpice.  There are others.)

Good luck with your project!  And welcome to the forum.

[Benjamin_collier]

I am aware that the string of capacitors and the breadboard are likely affecting my performance due to large parasitics but I want to dial it in before I put it on a protoboard or a PCB.

Unfortunately, I believe parasitics are causing too much trouble to allow reasonable tuning.  With a couple changes, you can likely make a breadboard build that works well enough for tuning.

First, for all power circuits such as Tesla coils, it is important to keep high-current connections separate from control signals, including FET gate drive.  In particular, primary B+ lead needs to go to B+ bypass caps away from control circuitry, directly at FET.  In other words, FET drain to primary winding to bypass caps to FET source needs to be wired separately from FET gate and control circuitry.  A separate wire from FET source is needed to connect to control electronics.  Best to twist that source wire with gate wire (twisted pair) as Steve did in his build.

I am not sure what you mean by B+ and what you mean by "wired seperatley". Maybe you could provide a drawing to clarify what you mean? Thanks for the feedback, I am currently working on putting it all on a protoboard but I have gone through several mosfet drivers. I assume its from transients in my supply and ground so perhaps I need better bypass capacitors.

[davekni]

I am not sure what you mean by B+ and what you mean by "wired seperatley".

"B+" means the signal (supply voltage) labeled "B+" in the schematic you posted.  I used the same name to match what is in your first post.

I don't have time to redraw the schematic.  But take the upper left power supply section, T1 through C3, and move that to the right of Q1.  Then make the physical connections match the schematic.  Wire from supply section (B+ and Ground) to L1 and source of Q1.  Then wire source and gate of Q1 to driver section (U3 and R5).  Only connection that needs to bypass FET is signal +12V.  (Would be best to have an inductor or at least ferrite bead in series with +12V between supply section and driver section since "ground" potential will be a little different due to wire inductance.  Probably not critical, however.)  Will also work best if C1, C2, and C9 are at least somewhat close to Q1 and L1 (primary coil) lead wires are twisted as they run from Q1 drain and B+ to coil.