Author Topic: DRSSTC dimensioning sanity check  (Read 307 times)

Offline Spuriosity_

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DRSSTC dimensioning sanity check
« on: December 21, 2021, 06:28:44 AM »
I'm trying to build my first DRSSTC from parts left over from a SGTC.

I'm reusing the secondary sircuit as is, with a resonant frequency of roughly 180kHz. I have 16x KEMET R76TR34704030J 470nF 1.6kV capacitors on hand, which were originally wired in series for a SGTC. I'd like to reconfigure these for higher capacitance and lower primary inductance.

I've been using Mads' handy calculator to try to design my nascent DRSSTC's primary capacitor, and it seems to be very difficult to get the thermal rise under control.

I'm inferring the ESR from the listed dissipation factor tanδ ≈ 0.3% -> ESR= tanδ*X_C = 1.6mΩ @180kHz.

I can't find any values for the thermal dissipation factor though, so I assumed they were about the same as the other Kemet capacitor Mads listed (R76UR3150SE30K), which was 23 ºC/W.

I'm benchmarking everything assuming 400A peak primary current (I have a full bridge of 8x FGY75N60 IGBTs, i.e. each IGBT is run in parallel, for an in-principle 450A of peak current handling), and a crazy overestimate for on time and BPS (200uS, 200BPS)

  • 2 series strings of 8 -> 117nF, L_pri = 7uH, 15C rise per cap, 44A ripple current (!)
  • 4 series strings of 4 -> 470nF, L_pri = 1.6 uH, 3.68C rise per cap, 185A ripple current (!)
  • 3 series strings of 5 -> 282nF, L_pri = 2.5 uH, 6.5C rise per cap, 114A ripple current

My primary bus capacitor bank (3x Kemet 400V 2000uF caps in parallel, in hindsight I should've gone for 450V) is fairly feeble, it can only handle around 40A of ripple current. It likely needs further reinforcement if I want it to survive.

This is my first DRSSTC, so I wanted to ask for a sanity check on these numbers. Basically,
  • Can I get away with configuration (1) as is, or do I need more bus caps?
  • Would I be better off modifying the MMC for a higher primary inductance?

Offline Mads Barnkob

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Re: DRSSTC dimensioning sanity check
« Reply #1 on: December 21, 2021, 08:01:20 AM »
Getting capacitor datasheet values is not always easy, especially for film capacitors that are not really pulse capacitors, but we use them as such. Just because they are polypropylene capacitors, does not make them invincible :)

Check out page 8-9 on how to calculate the missing Rth: https://www.icel.it/docs/2018/img_1af32843bb.pdf the last formula of Rth = delta T / Pdissipation, is properly the easiest, but then getting the power dissipation is a job in itself due to the waveforms etc. Might just be easier to assume that its like a known capacitor.

I assume you mean 2 parallel strings of 8 in series, 3 parallel strings etc... but why is the 2 strings so much lower in current handling than 3 and 4?

10 degree Celsius delta T is the maximum design rating for a polypropylene capacitor, so I would go with option 3 of MMC configurations.

Your 3 primary inductances, could you please refer to those are a number of primary turns instead?

But generally, if you do not have much money to through at it, or want to use what is at hand, its often easier/cheaper to build a higher impedance primary circuit and do with more losses in the IGBTs
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Offline Spuriosity_

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Re: DRSSTC dimensioning sanity check
« Reply #2 on: December 22, 2021, 01:48:08 AM »
Hi Mads - sorry for being unclear, the ripple currents I'm quoting are the DC bus ripple. The 2 parallel strings have much lower ripple due to the higher L_pri.

I've missed something very important though - the RMS current rating of my caps is only 9A at 200kHz. Looks like 400A peak current was a bit ambitious, but if I go back to 300A peak current, 150us on time the temperature rise is within tolerable limits. More importantly, the effective RMS current is (barely) within spec.

Full coil specs, for completeness:

Secondary 1300t on 100mm pipe, topload is a toroid ~1m from the ground with 500mm diameter
Primary coil: 8 turns, conical, slope ~45 degrees, radius 7cm-18cm. Using full length, inductance is ~15uH.
Inverter: 8x FGY75N60 double full bridge
Bus capacitor: 3x 2000uF, 400V electrolytic
Driver: profdc9's UD2.9

In short, the number of turns on the primary depends on if I use the core or the edge of the cone. The low inductance options (<2uH) would correspond to only 2-3 turns.

Longer term, it looks like I'll have to look at rebuilding the MMC and improving the DC bus. But with the parts I have now, I'll have to current-limit to around 200A to be on the safe side.


Offline davekni

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Re: DRSSTC dimensioning sanity check
« Reply #3 on: December 22, 2021, 05:05:56 AM »
Quote
I've missed something very important though - the RMS current rating of my caps is only 9A at 200kHz. Looks like 400A peak current was a bit ambitious, but if I go back to 300A peak current, 150us on time the temperature rise is within tolerable limits. More importantly, the effective RMS current is (barely) within spec.
If you have a fan blowing directly on the caps, you can likely get away with higher current.  The rated currents are for long-term use with high reliability.  DRSSTCs are rarely ran for more than a few hours in their lifetime.  I'm guessing you could even get away with your 9S2P configuration at 300A peak (18Arms per cap) with good cooling.  However, I agree that it is better to start conservative.

Your bus caps are unlikely to be a problem.  40A is plenty.  Vbus ripple current will be well below MMC current.

BTW, here's an option for 8 TO247 IGBT interconnect with low parasitic inductances:
https://highvoltageforum.net/index.php?topic=1324.msg9886#msg9886
Read the initial post too for context (half-bridge version).
David Knierim

High Voltage Forum

Re: DRSSTC dimensioning sanity check
« Reply #3 on: December 22, 2021, 05:05:56 AM »

 


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