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Messages - davekni

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1
Self-starting depends on the initial gate transition after enable causing enough voltage at the secondary top (top load) to couple into the antenna and cause a second transition.  The 1N5819 diode's leakage current will bias UCC37321 input pin 3 to roughly half supply, ~6V.  This is above the UCC37321's input threshold voltage of 1-2V (per spec).  Being inverting, the output (pin 4) will start low, the same as disabled state, so no initial transition to start oscillation.

The easiest (and I think most reliable) way to get self-starting is with a feedback resistor from output (pin 4) to input (pin 3).  100k to 1meg is likely to get things going.  To make it ideal, remove the 180V supply and adjust the feedback resistor until gate frequency roughly matches coil operating frequency.  Then turn 180V back on and it should self-start reliably.

You will still need to check both primary polarities to see which works properly after making the above change.

BTW, I think this circuit would be better with a 1:1 GDT wound with a twisted pair for minimal leakage inductance.  12V is sufficient to drive a MOSFET gate.  If you want a bit more drive, increase UCC37321 supply voltage from 12V to 15V.

2
With gate resistors bypassed, your gate waveforms look great.  DRSSTC H-bridges should switch close to zero current.  Vgs rise/fall times do not need to be particularly fast when switching low currents.  Also, these FETs are specified for 10Vge operation.  The relevant switching time is 0Vgs to 10Vgs, and from 10Vgs to 0Vgs (or slightly more to account for FET internal gate resistance, which doesn't appear to be specified for IRFP360).

If you want to further decrease rise/fall times, GDT leakage inductance needs further reduction.  One simple change is to reduce GDT turns.  Presuming a reasonable ferrite core (not powdered iron), 2 or 3 turns is likely plenty for 470kHz.  (Looks like your core has at least 50mm^2 cross-sectional area.)  Fewer turns shortens total GDT wire length.  Leakage inductance is proportional to wire length, including leads.  (Nice job with GDT winding and lead twisting.)  Another GDT change could further reduce leakage inductance:  Change from one primary wire to 4, one twisted pair winding for each FET, with all four primaries paralleled.  See this post for construction details:
https://highvoltageforum.net/index.php?topic=1854.msg13949#msg13949

Are you planning to run your H-bridge at 35V or less?  Looks like a 35V bypass capacitor at the bridge.  If you do plan higher voltage (and a cap change) eventually, you may want to consider lower parasitic inductance in bridge construction too.  This example starts with a half-bridge, later updated to full bridge.  Details aren't critical, just the idea of overlapping parallel planes:
https://highvoltageforum.net/index.php?topic=1324.msg9795#msg9795

Great post too.  Plenty of detailed pictures and scope captures.

3
Quote
And what could have caused this problem?
Are you using an antenna for feedback, or a current transformer on secondary current?

4
Solid State Tesla Coils (SSTC) / Re: SSTC with push-pull configuration
« on: January 15, 2022, 07:10:03 PM »
Quote
Probably will be better to use an half-bridge with a voltage doubler to keep it simple!
In addition in the push-pull setup is more difficult to keep low parassitic inductance, that results in higher voltage spike.
Yes, half-bridge is easier.  No issue with parasitic inductance between halves of a center-tapped primary since primary is now a single coil.  It is still good to minimize parasitic inductance within electronics for half-bridges.  Consider this simple interconnect option:
https://highvoltageforum.net/index.php?topic=1324.msg9795#msg9795

5
Solid State Tesla Coils (SSTC) / Re: SSTC with push-pull configuration
« on: January 14, 2022, 08:39:07 PM »
Efficiency will be lower due to FET avalanche breakdown every cycle.  Study this thread for issues and optimization of a push-pull system:
https://highvoltageforum.net/index.php?topic=1823.msg13766#msg13766
It is for ferrite transformer drive, but the issues and mitigation are identical.

6
General Chat / Re: Unusual Youtube channel activity
« on: January 14, 2022, 08:14:17 PM »
Quote
My only explanation is the link got shared with some big group and a lot of people in that group suddenly viewed it.
I have no evidence either, but I suspect this is accurate.  Likely a youtube channel with many subscribers added your video to one of their playlists, or shared a link as you said.  I see such behavior occasionally on one or another of my youtube videos.

7
Yes, Infineon 60R037P7 looks to be a very fast-switching FET.  It has low Crss (Miller capacitance), so will have rapid Vds rise and fall times.  That is generally great for low losses, but can cause problems, especially with GDT gate drive.  I've had two such projects with fast FET H-bridges fail for this issue, where the fast rise and fall times and GDT inter-winding capacitance cause high-frequency oscillation at each transition.

Several design details can help mitigate this issue:
1) Clean circuit layout with ground planes, for both driver and H-Bridge.  In case you haven't seen it, here's my recommendation for bridge layouts (half bridge initially, full bridge in second post):
https://highvoltageforum.net/index.php?topic=1324.msg9795#msg9795
2) Minimize GDT turns and twist lead wires.  In case it's helpful, my GDT tutorial so far:
https://highvoltageforum.net/index.php?topic=1854.msg13949#msg13949
3) Add common-mode chokes to GDT leads, especially the high-side FET output(s).  One high-side FET for a half-bridge, two for a full-bridge.  Make these GDT output leads longer and wind several turns around another ferrite core.  Two separate cores for a full-bridge, one for each high-side FET.
4) Add gate series resistors if you don't already have such.  May not help all that much given the low Crss of these FETs.

If the above is not sufficient, then pick slower FETs or change to fast IGBTs.  Or, with a bit more complexity, change to an isolated high-side gate driver IC instead of GDT.

8
Solid State Tesla Coils (SSTC) / Re: GDT Testing
« on: January 11, 2022, 06:50:49 AM »
Quote
Quote

    For testing GDT, a single FET load is appropriate for a single twisted-pair winding, so ~22nF with 5-10 ohms in series.  High-turn limits do need the load to show up.  Optimum damping resistance will increase with turns (with total twisted pair length including leads).  For low-turn limit, no load is necessary.


If I understand correctly, are you saying a more real world measurement would be to probe the GDT when it is connected to a single MOSFET to approximate the final output? Rather than trying to do it all at once and having to deal with leakage inductance being multiplied many times over skewing measurements.
Yes, exactly.

Quote
Quote

    However, test at half operating frequency to accommodate initial startup pulse where current from previous pulse is missing.


If plan on the running the coil at ~470kHz the GDT not only needs to work at that frequency but also at half of that (~235kHZ)?
Half frequency (235kHz) comes from the need to start and stop with enable pulses.  Normally, GDT magnetic flux is zero at the centers of the positive and negative half-cycles.  It is maximum at the voltage transitions.  Flux is a triangle wave, the integral of GDT voltage square wave.  Each half-cycle starts with flux in one polarity, ramps to zero, and then to the opposite polarity.
However, for the very first half-cycle, flux is starting at zero.  The ramp peak-to-peak is the same, so it ramps from zero to 2x normal peak flux (rather than from -1x to +1x).  Startup at 470kHz is the same peak flux as continuous operation at 235kHz.

Quote
hanks for the compliment! If you have pictures and would not mind sharing I would like to see how you added the ground plane to your hand-constructed circuits. Are you referring to supergluing little pads on top of the ground plane and making all of the connections on them?
There are many techniques.  Here are links to a few commercial breadboard products with ground planes.  I've used some similar ones, but not these specific versions (only internal Tektronix or Xerox boards from my work):
https://www.sparkfun.com/products/retired/8815
https://www.amazon.com/SMT3U-SMTboard-3U-Sided-Unplated-Ground/dp/B0040Z1FVE
https://www.tindie.com/products/SpeedyLab/prototype-pcb-board-with-ground-plane-3/
https://www.kickstarter.com/projects/pnmini/speedyproto-the-only-protoboard-with-a-ground-plan
For discrete transistor work (and occasionally SMD ICs), I often start with bare double-sided copper clad, using back side for ground and top side for circuitry, cutting top-side copper with Dremel tool:

This isn't a high-voltage board, just an example of technique.  Cuts are with a small rotory-tool cutoff wheel, with edges cleaned up using a knife and light sanding to finish.

Finally, ECBs are surprisingly cheap and fast ordered from China.  Shipping is much more expensive than the boards themselves, at least for simpler designs.  Even 4-layers is reasonable.  I use:
https://www.allpcb.com/

9
Quote
Quote from: davekni on December 22, 2021, 05:40:53 AM

    What antenna input circuit do you have now (parts around HC14 input)?

I haven't made any modifications to the antenna circuit as it seems to be working fine now (Does the addition of the resistor between pins 2/3 of the 74HC14 and the 1k resistor mean a performance boost, improvement or something?).

Sometimes when I bring something closer to the output, the spark becomes very thin as if it lost power. After raising the primary height this behavior started to happen less often but still present sometimes when I bring things closer to the output. What is the reason for this to happen?
A proper toroid can solve this problem?
This Labcoatz SSTC 2.0 circuit has problems when used with current transformer feedback.  Yes, it may function some, but it could also be your issue here.  I'd fix this before exploring anything else.  See this post for examples:
https://highvoltageforum.net/index.php?topic=1888.msg14153#msg14153

10
Quote
The differential probe is a Micsig and specified to measure up to 5600 volts between the probes.
Probe may have an issue with the combination of voltage and frequency.  Most probes include specifications for voltage derating as frequency increases.  I haven't found such for Micsig.  Some probes derate voltage drastically at relatively moderate frequency.  Steve Ward fried his Micsig differential probe at lower voltage and higher frequency:
https://highvoltageforum.net/index.php?topic=1589.msg12279#msg12279

11
Solid State Tesla Coils (SSTC) / Re: GDT Testing
« on: January 10, 2022, 04:21:46 AM »
Quote
Actually, I am using an LM7815. I figured the few extra volts might improve drive as the UCC's would be powering a full bridge. To reduce the potential of damaging the gate due to excess voltage I plan on swapping it out for a 12v regulator.
Then something more is wrong.  The unloaded scope traces show 11V output swing from the UCC.  It should be 15V.  A part of that discrepancy appears to be mis-adjusted scope probe compensation.  Fixing that likely would show 12-13V swing, still below expected 15V.  I recommend finding and fixing this issue in case the cause is related to other behavior.  (Perhaps your incoming DC supply is only 15V, so the LM7815 can't output more than ~13V.)  Yes, I'd recommend 12V for driving FETs.  Especially at your high 470kHz, driver chip heating may be problematic at high duty cycles, even more so at 15V.

Quote
I was only using a bifilar winding for testing. Since I planned on removing turns and comparing results along the way I didn't see the need to wind the other FET connections. (primary and secondary for testing)
With the entire 100nF load on one GDT winding, that winding's leakage inductance has 4x current flowing through it, so will make larger artifacts.  If you want to continue testing this way, at least add ~2ohms in series with 100nF.  Waveform will be overly rounded, but look more normal.

Quote
What I don't understand still is why I am getting these results? Is simply substituting a capacitor as a test load that much different from driving an actual MOSFET? How do others test GDTs? The point of testing the GDT with various loads was to find the correct number of turns required before making the final full bridge GDT. I wanted to see the impact of too many turns via my scope to learn more about what is happening in real time.
For testing GDT, a single FET load is appropriate for a single twisted-pair winding, so ~22nF with 5-10 ohms in series.  High-turn limits do need the load to show up.  Optimum damping resistance will increase with turns (with total twisted pair length including leads).  For low-turn limit, no load is necessary.  However, test at half operating frequency to accommodate initial startup pulse where current from previous pulse is missing.

Quote
I have made several breadboard layouts before and have had decent results. I was thinking this should be my best yet but it has not performed that way so far. I tried keeping the power rails as neat as possible, especially the ground connections.
Have any previous breadboards switched this much current (9A peak) this quickly?  Yes, your breadboard construction looks very neat, better than most of my projects.  Neatness usually implies short connections, which helps.  However, connections cannot be short enough to match the low inductance of parallel overlapping copper planes.  These days almost all of my hand-constructed circuits are built with at least a ground plane under the entire circuit.  As I said, your build is likely good enough.  However, parasitic inductance is part of the signal anomalies you are puzzling over.  Other part is the odd output impedance behavior of UCC chips, which unfortunately is not well specified.  Adding an appropriate series damping resistor to your 100nF test load will help somewhat with odd UCC output waveform behavior.

12
Transformer (Iron Core) / Re: 8x MOT transformer, weird power draw
« on: January 10, 2022, 03:54:59 AM »
It is more fun learning by experiment than by studying, though both are necessary.

First, is 44H output leakage inductance (shorted primary) or open primary inductance?  An ideal transformer has infinite open-primary inductance and would make arcs.  Maximum current draw requires matching caps to leakage inductance.  That includes variac inductance, so would be measured with input to variac shorted and variac set to your nominal 180V dial position.

Second, steel (lamination) permeability is quite non-linear with field strength.  Especially non-linear at both low-fields (low voltage and current where the meter operates) and at high fields (near saturation).  Meter measurements may be off by 2x or more compared to typical transformer use.  High-field non-linearity results in complex behavior at high arc current:  arc current changes field strength which changes inductance which changes resonance and therefore changes arc current.  If it weren't for this non-linearity, I'd expect max arc performance to match max line current draw.  BTW, the optimum capacitance may change for 400V operation relative to 180V due to non-linearity.

Have you taken any steps to improve MOT insulation between windings and laminations?  I needed to add epoxy to get even my 2s configuration to not arc (with one secondary end grounded and resonant MMC charging to 9kV peak).  With floating secondaries the voltage may roughly split evenly, but peak will not be far below +-9kV.  You may find an issue when extending to 400Vac input.

13
Solid State Tesla Coils (SSTC) / Re: GDT Testing
« on: January 09, 2022, 05:10:50 AM »
I think your driver will function well with real GDT wound with 4 twisted pairs and proper gate series resistors (around 5 to 10 ohms each gate).  Your 100nF calculation is good.  Here's my 2-output GDT example with links to 4-output versions made the same way:
https://highvoltageforum.net/index.php?topic=1854.msg13949#msg13949
Total leakage inductance of the 4 pairs will be roughly 1/4th of your 1 pair test GDT.

There has been a rash of counterfeit UCC driver chips, but they appear to function except for enable input.  Not likely your issue.

I presume you are running the driver at 12V, not 15V per schematic.

UCC output stage is a bipolar/MOS combination.  Output impedance is much higher close to supply rails than would be implied by 9A peak current.  That is part of the strange shape you see on UCC output, especially the rising transitions.  Remainder is likely wiring inductance on your breadboard.  That breadboard contribution will not go down with the 4-twisted-pair GDT.  Probably OK still.

Additional bypass capacitance at the UCC chips is always a good idea, especially with breadboard construction (no ground or power planes).  I'd suggest at least 0.47uF at each driver chip.  (1uF electrolytic capacitors likely have too high ESR, so likely need to be larger if electrolytic.)

At 470kHz you can use fewer GDT turns.  That reduces total twisted-pair wire length, reducing leakage inductance.  4 turns is likely good, though the minimum depends on ferrite core size and saturation flux density.


14
Nicely paired primary lead wires.  That keeps effective coupling high by avoiding parasitic inductance.

In general, your build looks fine.  My guess is that you just need more power (higher input bus voltage).  Ideal phasing between primary and secondary voltage is 90 degrees.  60 is close enough.  Adjusting to 90 would increase input current a bit (~15%) and therefore increase power a bit at your fixed 30Vdc input.

To avoid possible issues when increasing power, I suggest soldering GDT output leads closer to the FET packages, especially the FET source leads.  Otherwise wiring inductance is shared between high current path and gate drive, leading to unwanted voltage distortion of gate drive.

15
Solid State Tesla Coils (SSTC) / Re: First SSTC based on profdc9 PCB Pack
« on: January 07, 2022, 05:15:38 AM »
Quote
This driver doesn't seem to have any sort of interrupter built in. Does this mean the coil will be operating in CW mode the whole time and so won't heat/ power be a concern?
The schematic you posted does include an optical isolator, disabling operation when the isolator LED is energized.  You could use that for interruption.  I don't see any other interrupter functionality.  Continuous operation can be fine.  That is the way my SSTC runs.  Behavior is somewhat different relative to interrupted operation.
https://highvoltageforum.net/index.php?topic=1021.msg7119#msg7119

Quote
How much of a concern is inrush current, and could you recommend appropriate NTC thermistors for current limiting? Would using a variac remove the need for inrush limiting?
Either works.  Two NTC specification parameters are most important:  First is energy capability.  NTC must be rated to handle the energy stored in your bulk capacitor.  Look for units of Joules.  Second is continuous current (RMS amps).  Necessary rating depends on the power your coil will draw during operation.  Somewhat less important specification is cold (nominal) resistance.  That determines what the initial inrush current will be.  Building power circuits are designed to handle inrush of incandescent light bulbs and motors, often 10x rated continuous current.  Finally, most NTC inrush limiting designs use a relay to bypass (short across) the NTC a few seconds after power-up.  For home projects I often skip this, but NTC reliability isn't great when used continuously near rated current.

16
Dual Resonant Solid State Tesla coils (DRSSTC) / Re: DRSSTC tuning
« on: January 07, 2022, 05:01:21 AM »
Quote
I repaired it by soldering two or three turns together, shorting the bottom and top part of the broken secondary, but creating one or two closed loops. Is it good enough, or the closed loops will overheat?
Yes, will overheat.

17
Would be easier if you ask this question in your original QCW post.  Otherwise the basic parameters of your build are missing.

A larger-diameter top-load would help reduce such strikes.  I had some of the same issues with my low-frequency (~100kHz) QCW experiment.  Also similar results of occasional semi-straight QCW arcs and many more branched ones.
https://highvoltageforum.net/index.php?topic=1268.msg10067#msg10067
https://highvoltageforum.net/index.php?topic=1268.msg11784#msg11784

18
Solid State Tesla Coils (SSTC) / Re: Full Bridge SSTC
« on: December 31, 2021, 07:46:57 PM »
Quote
why does the newer UDs (2.1 upwards) have resistor in parallel with the dc blocking capacitor?
The resistor damps the unwanted resonance between GDT inductance and coupling capacitance.  (The unwanted resonance shows up at the start and end of interrupter pulses.)

19
Solid State Tesla Coils (SSTC) / Re: Full Bridge SSTC
« on: December 30, 2021, 06:45:25 AM »
Quote
As far as phase goes and compensating for the delay, that should be something I can tune and leave alone, right?. The delay I am compensating for by adding/adjusting the phase lead is to correct for any logic delays. I feel like once that is accounted for it should remain constant, is that accurate?
Generally, yes.  Phase can change somewhat with feedback amplitude, but likely not enough to matter.

Quote
Would a 50% duty cycle at the gate be achieved by a more square output from the GDT rather than the one I am getting, which is more slopped?
No, duty cycle has little to do with rounding.  It is the fraction of time the gate signal is high.  If high 50% of the time (therefore low 50% of the time), then the average (DC) voltage is zero, so can be connected directly to a GDT.  If not close enough to 50%, then there is too much average DC voltage.  The coupling capacitor removes that DC voltage so that it doesn't cause DC current in the GDT (which could saturate GDT core).

20
Not sure if this is relevant to your experimenting, but here's a video of mine on penny launching showing the advantage of an iron core etc.
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post Re: Strange reading for grid feedback coil voltage
[Vacuum Tube Tesla Coils (VTTC)]
MRMILSTAR
January 12, 2022, 03:29:04 PM
post Re: Help with SSTC feedback circuits with 4046 IC and Schmitt Triggers
[Solid State Tesla Coils (SSTC)]
AFreshLad
January 12, 2022, 01:30:38 PM
post Re: Strange reading for grid feedback coil voltage
[Vacuum Tube Tesla Coils (VTTC)]
304er
January 12, 2022, 09:09:13 AM
post Re: Strange reading for grid feedback coil voltage
[Vacuum Tube Tesla Coils (VTTC)]
MRMILSTAR
January 11, 2022, 08:05:27 PM
post Re: Nokia Siemens 3G Flexi 2100MHz 50W Amplifier Teardown
[Radio Frequency]
Mads Barnkob
January 11, 2022, 07:42:12 PM
post Re: Strange reading for grid feedback coil voltage
[Vacuum Tube Tesla Coils (VTTC)]
Duane B
January 11, 2022, 07:33:15 PM
post Re: 8x MOT transformer, weird power draw
[Transformer (Iron Core)]
AstRii
January 11, 2022, 06:19:49 PM
post Re: Strange reading for grid feedback coil voltage
[Vacuum Tube Tesla Coils (VTTC)]
304er
January 11, 2022, 05:19:46 PM
post Re: Strange reading for grid feedback coil voltage
[Vacuum Tube Tesla Coils (VTTC)]
MRMILSTAR
January 11, 2022, 04:31:28 PM
post Re: 8x MOT transformer, weird power draw
[Transformer (Iron Core)]
AstRii
January 11, 2022, 03:21:37 PM
post Re: GDT Testing
[Solid State Tesla Coils (SSTC)]
davekni
January 11, 2022, 06:50:49 AM
post Re: Strange reading for grid feedback coil voltage
[Vacuum Tube Tesla Coils (VTTC)]
Duane B
January 11, 2022, 06:34:20 AM
post Re: Help on my "first" SSTC (LabCoatz SSTC 2.0)- Popping transistors
[Solid State Tesla Coils (SSTC)]
davekni
January 11, 2022, 06:24:13 AM
post Re: Strange reading for grid feedback coil voltage
[Vacuum Tube Tesla Coils (VTTC)]
davekni
January 11, 2022, 06:15:08 AM
post Re: Strange reading for grid feedback coil voltage
[Vacuum Tube Tesla Coils (VTTC)]
MRMILSTAR
January 11, 2022, 05:25:31 AM
post Re: Strange reading for grid feedback coil voltage
[Vacuum Tube Tesla Coils (VTTC)]
Duane B
January 11, 2022, 12:07:22 AM
post Strange reading for grid feedback coil voltage
[Vacuum Tube Tesla Coils (VTTC)]
MRMILSTAR
January 10, 2022, 10:56:48 PM
post Re: Hi! 811 A tesa coil
[Vacuum Tube Tesla Coils (VTTC)]
Duane B
January 10, 2022, 09:38:53 PM
post Re: Help on my "first" SSTC (LabCoatz SSTC 2.0)- Popping transistors
[Solid State Tesla Coils (SSTC)]
ZakW
January 10, 2022, 07:50:13 PM
post Re: GDT Testing
[Solid State Tesla Coils (SSTC)]
ZakW
January 10, 2022, 07:19:17 PM
post Re: Help on my "first" SSTC (LabCoatz SSTC 2.0)- Popping transistors
[Solid State Tesla Coils (SSTC)]
TiagoBS
January 10, 2022, 03:13:08 PM
post Re: GDT Testing
[Solid State Tesla Coils (SSTC)]
davekni
January 10, 2022, 04:21:46 AM
post Re: Hi! 811 A tesa coil
[Vacuum Tube Tesla Coils (VTTC)]
304er
January 10, 2022, 03:59:09 AM
post Re: 8x MOT transformer, weird power draw
[Transformer (Iron Core)]
davekni
January 10, 2022, 03:54:59 AM
post Re: GDT Testing
[Solid State Tesla Coils (SSTC)]
ZakW
January 09, 2022, 11:45:09 PM
post Re: Hi! 811 A tesa coil
[Vacuum Tube Tesla Coils (VTTC)]
jpvvv123
January 09, 2022, 11:04:25 PM
post 8x MOT transformer, weird power draw
[Transformer (Iron Core)]
AstRii
January 09, 2022, 04:22:11 PM
post Re: Hi! 811 A tesa coil
[Vacuum Tube Tesla Coils (VTTC)]
Duane B
January 09, 2022, 05:52:11 AM
post Re: GDT Testing
[Solid State Tesla Coils (SSTC)]
davekni
January 09, 2022, 05:10:50 AM
post Re: Performance issues regarding phase angle in SSTCs
[Solid State Tesla Coils (SSTC)]
davekni
January 09, 2022, 01:20:40 AM
post GDT Testing
[Solid State Tesla Coils (SSTC)]
ZakW
January 09, 2022, 12:38:28 AM
post Re: General Questions
[Dual Resonant Solid State Tesla coils (DRSSTC)]
flyingperson23
January 08, 2022, 06:36:28 PM
post Performance issues regarding phase angle in SSTCs
[Solid State Tesla Coils (SSTC)]
Max Seiringer
January 08, 2022, 03:21:31 PM
post Re: Hi! 811 A tesa coil
[Vacuum Tube Tesla Coils (VTTC)]
304er
January 08, 2022, 09:05:41 AM
post Re: Hi! 811 A tesa coil
[Vacuum Tube Tesla Coils (VTTC)]
jpvvv123
January 07, 2022, 10:20:10 PM
post Re: Hi! 811 A tesa coil
[Vacuum Tube Tesla Coils (VTTC)]
304er
January 07, 2022, 05:56:28 PM
post Re: First SSTC based on profdc9 PCB Pack
[Solid State Tesla Coils (SSTC)]
davekni
January 07, 2022, 05:15:38 AM
post Re: DRSSTC tuning
[Dual Resonant Solid State Tesla coils (DRSSTC)]
davekni
January 07, 2022, 05:01:21 AM
post Re: How to prevent secondary to secondary to primary arcs?
[Dual Resonant Solid State Tesla coils (DRSSTC)]
davekni
January 07, 2022, 04:59:59 AM
post Tophat QCW 1
[Dual Resonant Solid State Tesla coils (DRSSTC)]
dbach
January 07, 2022, 02:27:35 AM
post How to prevent secondary to secondary to primary arcs?
[Dual Resonant Solid State Tesla coils (DRSSTC)]
dbach
January 07, 2022, 02:19:40 AM
post Re: General Questions
[Dual Resonant Solid State Tesla coils (DRSSTC)]
Mads Barnkob
January 06, 2022, 09:33:06 PM
post Re: First SSTC based on profdc9 PCB Pack
[Solid State Tesla Coils (SSTC)]
alan sailer
January 06, 2022, 06:09:39 PM
post Re: DRSSTC tuning
[Dual Resonant Solid State Tesla coils (DRSSTC)]
kubajed
January 06, 2022, 04:48:22 PM

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