Blew my first MOSFET, but it seems like it shouldn't have blown the way it did

[curtislemay]

I plugged in my first SSTC for the first time tonight (Kaiser SSTC III based)
Instantaneously when I connected it to 115VAC, the FET blew (IRFP460). Upon investigation with a multimeter, I found there is now a gate-drain short.
Is this the common failure mode for FETS? I expected the FET would fail after a few seconds or minutes when the thermal load got too high.

[Da_Stier]

It depends on how much you overloaded the device.
As you said most devices die from a continous overload resulting in a thermal death.
However if there is a powerful enough spike in the current as you connect it, it can blow up immediately.

The normal failure due to a overload situation is that the drain is shorted to the source with the gate being open.
If you have a short between gate and drain I would take a look at your gate control circuit, since it might have an isolation issue.
If there is no galvanic isolation between your power side and the gate, the gate will see the HV and totally destroy the FET, since most FETs have a maximum Gate-Source Voltage of around 18V or so.

Hope this helps,
Michael

[John123]

What do your gate waveforms look like? I think that can be a source of instant failure if over voltage happens there.

[curtislemay]

John, how would I safely probe this part of the circuit? The input to the H bridge is exactly what I think it should be.

[ritaismyconscience]

Can you send pictures of your setup.

Also, you just need to plug in your gate drive setup and not the actual bridge. That way you can safely measure it with the scope.

[John123]

John, how would I safely probe this part of the circuit? The input to the H bridge is exactly what I think it should be.

Well I don't have isolation transformer either, but the best I can do is power the driver from a floating supply like a power supply and or batteries then do the same for the bridge with no connection to mains. Scope gate to source and watch as voltage is applied to the bridge as this is when the gate drive waveform can start to look less ideal (miller capacitance). Careful not to short out the fets and gate drive with the common probe ground clips, might have to measure the lower fet drain to gate and invert the signal so the ground clips can clip onto the same point.

For the floating bridge power use resistors or current limit on the supply in case it goes pop again whilst probing the gates, then once that looks ok move onto connecting some kind of inductive load where the tesla coil primary should be, those SMPS transformers work ok (in reverse for low voltages on the bridge) here just put a restive load on one of their other coils to load it.

[curtislemay]

Here's the setup:
It's a very scrapped together quarantine mess, I'm working on getting a PCB for it. If I was at school, I'd have access to Altium, given the times I might just go for pirated Altium...

The bridge is exactly the same as in the Kaiser SSTCIII except I am using larger diodes. The driver is essentially the same, but I have an Arduino replacing the 555. I probed the Arduino output and was getting a good 10% duty cycle, 200us on time PWM.

[John123]

hmm I'm thinking maybe the construction of the bridge could have something to do with it, sure there's no shorts or open circuits anywhere? Are you using gate resistors?

[curtislemay]

I have a 4.7 Ohm resistor on both of the gates. I'm starting to think there may have been an arc between the gate and train of the FET. I'll probe everything, replace the FET, and make sure I put some electrical tape insulation between the pins until I get a PCB.

[John123]

I have a 4.7 Ohm resistor on both of the gates. I'm starting to think there may have been an arc between the gate and train of the FET. I'll probe everything, replace the FET, and make sure I put some electrical tape insulation between the pins until I get a PCB.

Before powering the bridge up again put something in series to limit the current and try it with a resistive load rather than a tesla coil, that way a fault is less likely to make it go pop.

[curtislemay]

Great idea, thanks!!

[Weston]

Looking at your bridge layout, I would say it is likely that your FETs failed due to voltage spikes. Also, you really need heatsink, a bare MOSFET has a thermal time constant of ~ less than 1 second. So even if the coil was working correctly it could have blown up almost instantly due to FETs overheating due to a lack of a heatsink. 

Your bridge layout needs a decoupling capacitor, preferably film, close to the two FETs. This will reduce voltage spikes generated by switching and the long wires (with inductance) connecting to the transistors (V = L*di/dt). What capacitors are you using for the return for the primary? (I don't see anything that looks like it would fit the requirements, if you are connecting the other side of the primary directly to ground that wold also cause the FETs to blow up.) You should be able to put those capacitors closer to the FETs and use them as a decoupling capacitor.

Also, you should consider getting a lab power supply so you can verify the tesla coil at lower powers. Also, it would be a lot safer than un-isolated mains voltage. These power supplies are decent and not that expensive: https://www.amazon.com/Variable-Adjustable-Regulated-Switching-Alligator/dp/B07MB8PB4X/ . Ideally it will pay for itself by reducing the number of components you blow up  . I scope would also be useful to be able to verify waveforms.

For PCBs, consider using KiCad. Its free and open source and used pretty widely in academia, research, and hobby / open source hardware projects.

[Mads Barnkob]

Generally, high power circuits does not like to be run as a bird nest layout, you need strict control over your parasitic inductance.

Did you power up the control logic/driver voltage before powering up the DC bus? If you power up both at once, you do not have control of the gate states and you might have a shoot through large enough to cause a short circuit following the DC bus being emptied through that.

[curtislemay]

My caps were all in with the diodes in the bridge, I (clearly) was not thinking about the distance between things and parasitic inductance. I knew the FETs wouldn't last long without heatsinks, but I expected they'd last maybe 10 seconds, not only 1.

I already have a lab power supply, I was just way to dumb to use it

I did power up and check that the driver circuit was running before I powered up the bus.

Thanks for your help guys!

[johnf]

Check out what others have done with regards to layout
Your present layout is designed for silicon sacrifice to the gods of electronics
try to get very short gate leads that do not go near high current leads, protect gate with 15 volt zener soldered directly on the FET pins gate to source.
leads as long as you have used add series inductance (several 100's of nH in this case so this now forms a tuned circuit with the gater capacitance and will cause excessive gate ringing that maybe brings the gate voltage down into its linear region therefore instant death from overheating the die or instant puncture of the gate to source layer in the Fet from the ringing voltage adding to the gate drive voltage and going past max gate voltage. It is because all circuits have series inductance that you must put the protection zener hard up on the gate itself.

[curtislemay]

For those wondering, I did have a video on it. I think I've figured out how to upload it here. The video is in slow motion.

[Mads Barnkob]

For those wondering, I did have a video on it. I think I've figured out how to upload it here. The video is in slow motion.

While your circuit layout is not the best, you still have one of the most important things going for you. ALWAYS have a camera recording when powering up power electronics

[Magneticitist]

Silly question but you sure those diodes are facing the right way?

[T3sl4co1l]

Yes.  Physically what happens is, some part of the die overheats directly or due to drain or gate breakdown, and that fuses everything together.  The slightest failure of this type results in a low resistance between all terminals: effectively, Rds(off) has a ceiling, rather than being an effective open circuit (100M+?), and there is some Rgs for a similar difference.

BJTs can also fail in this way, of course we don't expect the base to have a high resistance at any base voltage, so we might miss its lowered resistance; the collector resistance is however unmistakable.

These are small scale effects.  The resistance seems high to us (kohms), but is actually a dead short just a few micrometers across.  The whole transistor is some mm across, achieving its mohm on-resistance by sheer scale -- millions or billions of cells turning on in parallel.  Shorting out just one, doesn't seem like much from the outside, but it is indeed physical damage on a microscopic scale.

If the resistance is high enough not to disturb the circuit, such a slightly-failed transistor can actually continue to operate and go on unnoticed.  It's not common, but it's interesting that it can happen.

More often, heat in the breakdown region causes it to widen quickly; pretty soon, fault current is drawn from the supply.  In a half-wave switching circuit, effectively the transistor remains on, and pretty quickly fault current is drawn through the switching inductor.  In a full-wave circuit, probably nothing happens at first, but then the opposing transistor turns on, and suddenly it's switching into a short circuit; failure then cascades to both transistors.  In the following milliseconds, the supply capacitors are discharged, vaporizing the already-molten silicon (and bondwires) into plasma; in the following 10s of ms, the mains fuse clears, in which time the transistor's plastic case has already been propelled as hazardous shrapnel.

Using a fast ("semiconductor") fuse, and a minimum of local bypass capacitance, less energy will go into the plasma discharge; perhaps the transistor case merely cracks with a loud report, rather than fragmenting.  Perhaps it doesn't crack at all, and fails with no external evidence.

The final state, whether it's shorted or not, depends on when the fault cleared.  The transistor will eventually serve as a fuse itself, but this only happens much later.  Probably if the case has cracked, the connections are broken as well.  If not, it's probably a three-way short.

When driven by thermal overheating, failure can take 10s to 100s of microseconds of short-circuit conditions (Vds is high while on).  When driven by breakdown, it can be practically instantaneous (e.g. gate oxide failure, most often due to ESD).

Note that, when the device goes three-way short, a large fraction of available drain voltage and current is also available on the gate.  So, expect to replace gate drivers and other related components if this has happened.  Typical TC circuits with drive transformers, may manage to survive this (the transformer saturates in 100s us, shorting out the fault current locally, keeping it away from the driver), but should always be inspected.

This is more than enough time to detect what's going on, so we can design our circuits responsibly to address the one failure mode -- excessive current, faulting, short circuit conditions.  We use what's called a desat detector circuit, and disable drive when excessive current is seen for more than, say, a few microseconds.  This doesn't address voltage breakdown, which must be handled by proper design (drain circuit inductance, gate ESD susceptibility).


For amateur Tesla coils, it seems most likely to me that it's a combination of breakdown and thermal runaway.  Layout really does matter, and yes, even just a few inches of wire matters.  If you've built your circuit poorly, following the schematic but not the layout, the stray inductance will develop excessive peak voltages, and destroy transistors in short order.  It might runs for milliseconds, it might run for seconds, who knows.  It's not an instant failure, transistors are quite robust these days, many of them have an avalanche rating (D-S breakdown, acts like a zener).

Tim