Author Topic: First DRSSTC, Full Bridge PCB & IGBT Selection question.  (Read 4264 times)

Offline Benjamin Lockhart

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Re: First DRSSTC, Full Bridge PCB & IGBT Selection question.
« Reply #20 on: November 18, 2024, 08:43:20 PM »
For a full bridge like this, assuming you need to keep the peak primary current under 300A I think you will need quite a small MMC around 0.05uF. TMaxElectronics has a similar sized freewheeling coil and he had to reduce the tank capacitance because the primary current rose very fast.

Edit: Oh I see you have 0.025uF planned, that's plenty low. Maybe too low, but as long as you can hit the desired primary current it's ok.

A low aspect ratio allows higher coupling which helps keep primary current lower as well.
« Last Edit: November 19, 2024, 06:36:25 AM by Benjamin Lockhart »

Offline davekni

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Re: First DRSSTC, Full Bridge PCB & IGBT Selection question.
« Reply #21 on: November 19, 2024, 05:31:47 AM »
Quote
I have however thought of potential corrections if needed, I can print a different green backing plates that has gaps at the corners where it mounts and only touches the PCB behind where the IGBTs sit. giving that same effect as applying force to only the center of the package.
A similar option is to add small adhesive bumps to top center of IGBT packages, such as small pieces of thick tape or pieces of shim material with double-sticky tape to hold in place until clamping force is applied.  I've used that on several of my designs including one at work.

Quote
I guess that makes sense thinking about it. with these H7 IGBTs low conduction losses they probably suit longer on time higher impendence setups (lower peak but higher average current).
I think that's true for almost any IGBT.  At high current, power is closer to square of current, as the resistive component of Vce-on becomes dominant.  Lower current for higher duty cycle reduces IGBT heating for a given average line power.
Presume you've already noticed, but there are parts in this same family up to 3x die size (3x current to 600A rated peak).  Above 2x, mounting hole goes away in order to fit larger die.  Was just checking today to learn more about this part family since I wasn't aware of it until your mention here.

Quote
(and no I am not sure why the sample view window is that scuffed. I will try downloading and running it later. instead of just the web view one.)
JavaTC has a bug if vertical positions are exactly 0.  AFAIK, only result is blank drawing, not any calculation issues.  I've learned to move all positions up by some delta such as 1cm or 0.01cm to avoid bug.  Presume that will work for you too.

Quote
I have a kind of mini goal that I want the frequency under 200KHz just seems like it would be kinder to the IGBTs.
These are fast IGBTs even with hard switching.  I wouldn't be concerned about frequency.  However, increasing frequency wouldn't help.  If by lower inductance, impedance drops further.  If by smaller top load, frequency changes too much as arcs grow, limiting coil performance.  I'd keep at least existing 35cm or perhaps larger.  Would also consider raising top load to ~4cm (secondary radius) above top of secondary winding.  Allows more space for magnetic field to exit secondary top before being blocked by top load.  2cm should be OK, though, same area as secondary cross-section (PI * r * r).

Quote
its looking to be around 45Kohm so a hair under that magic 50Kohm you and others have mentioned.
Perhaps that will still be fine as long as primary impedance isn't too low.  I don't have specific experience here.  My DRSSTC is low for both impedances, and does not freewheel.

Primary impedance might actually be a bit too high.  Ideal primary impedance is very hard to calculate.  Depends on arc load model, which in turn depends on many factors including power level and duty cycle.  Also depends on bus voltage and OCD, but those are easier to adjust for.  Perhaps search for similar freewheeling coils at similar power level for examples.  If Vbus is different, scale primary impedance by square of Vbus ratio.  Hopefully others will add thoughts on primary impedance too.

Biggest issue is low coupling (0.111).  15mm diameter tubing is great for minimal heating, though large for this sized coil.  Can turns be spaced any closer while still providing space for tap point clamp?  That would reduce your large outer primary diameter and increase coupling.  A conical primary increases coupling, but might get primary too close to top load.  I'd get coupling to at least 0.14, preferably higher.
David Knierim

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Re: First DRSSTC, Full Bridge PCB & IGBT Selection question.
« Reply #22 on: December 05, 2024, 04:02:30 PM »
Hi.
Been a few weeks. had work stuff get busy.

Firstly I pulled together a IGBT comparison document, the 3 levels of new H7 vs the popular ONSEMI 60n60 and the Warp2 p50b60. screenshot below, access here https://docs.google.com/spreadsheets/d/19SJ_XF78NLKKTrzdJWrqDCWNzFxdLnFv1l2h88TbWC4/edit?usp=sharing



from this its clear to see that the low current H7 is universally better both switching time and current handling.

Ultimately I think I will probably use the mid current H7 (IKZA100N65EH7), 400A datasheet pulsed current, with similar switching losses to the 60n60 but with lower conduction losses. (that and I want to use the bolt hole in my thermal stack design.)

Thanks for the java TC tips. I managed to come up with a coil that I think will somewhat be inline with the design goals.





I am not 100% sure on the secondary. aspect ratio seems very tall compared to what I see others doing.

plan is to have the primary conical to avoid heating as much as possible, secondary will be mounted on variable standoffs so I can play with the K factor regardless of turn count / tap point.

Top load will be 3d printed, with large sheets of heavy duty aluminum kitchen foil attached with spray glue. bond wires will be used down an internal plastic channel in the spokes of the toroid to help minimize corona.

I am mildly interested in trying to design a PLL based driver. that would seem to be the best for having an initial startup frequency that self tunes to oscillation.
not sure it would be a good first driver endeavor though. will probably get a ud2.7 variant with modified pulse skip running first. possibly spin a board revision up over Christmas in a similar footprint to my inverter board. (not ordered yet but will once I have some CAD of the whole coil, likely also a Christmas thing).

Thanks again for your input.
Tom.

« Last Edit: December 05, 2024, 06:37:51 PM by Beggernator. »

Offline Benjamin Lockhart

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Re: First DRSSTC, Full Bridge PCB & IGBT Selection question.
« Reply #23 on: December 05, 2024, 08:36:20 PM »
I wouldn't go with a PLL driver for this.
I'd also decrease the primary outer diameter as much as possible to avoid too many strike rail hits.
A tall aspect ratio secondary is good for coils that run with with low on-time in the transient mode.

Make sure you have enough primary turns for at least 15% primary detuning.

Offline davekni

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Re: First DRSSTC, Full Bridge PCB & IGBT Selection question.
« Reply #24 on: December 05, 2024, 10:33:09 PM »
Quote
Firstly I pulled together a IGBT comparison document, the 3 levels of new H7 vs the popular ONSEMI 60n60 and the Warp2 p50b60.
Larger die H7 parts are slower because they are all specified with 10 ohms external gate drive resistance.  Reducing gate resistance in inverse proportion to die size should (mostly) maintain speed.  Fixed impedance of lead inductance would make larger die still slightly slower.
My guess as to why spec'ed gate drive resistance isn't reduced for larger die:  With hard switching, fast switching of higher currents would cause excessive internal die voltage spikes due to package lead inductance (C and E leads).  That's why specification is intentionally slower switching.  With ZCS, switching currents should be low enough to avoid such an issue.

Quote
I am not 100% sure on the secondary. aspect ratio seems very tall compared to what I see others doing.
Yes, aspect ratio is on high side, though not as high as my 6.8:1.  Key difficulty is obtaining enough coupling without getting racing sparks.  You'll want to lower secondary a bit to get at least 0.14.  More is better until racing sparks occur.

Top load looks small.  I'd consider making it at least a bit larger even though secondary impedance will drop.

Quote
I'd also decrease the primary outer diameter as much as possible to avoid too many strike rail hits.
Valid concern, but I'd not decrease primary diameter.  I'd consider increasing inner primary diameter a little.  Larger primary diameter helps increase coupling before racing sparks occur.  A well grounded strike rail should handle occasional hits.  A longer breakout point can help reduce hits to strike rail.
« Last Edit: December 06, 2024, 07:52:08 PM by davekni »
David Knierim

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Re: First DRSSTC, Full Bridge PCB & IGBT Selection question.
« Reply #25 on: December 06, 2024, 02:38:56 PM »
Many Thanks for your continued feedback.

Quote
Larger die H7 parts are slower because they are all specified with 10 ohms external gate drive resistance.

I had missed that they were using different gate resistors. the increase makes a bit more sense now. I have TVS diodes right next to the gate pins so hopefully will clamp any stray gate ringing lower gate resistances might cause.

Quote
Top load looks small.  I'd consider making it at least a bit larger even though secondary impedance will drop.
I have increased it a bit. don't want to take it too far. as secondary impedance drops rapidly.





Quote
I'd also decrease the primary outer diameter as much as possible to avoid too many strike rail hits.
A valid point I am working with what I can get tubing wise, toroid will be pretty smooth and I will have a large breakout rod with a tig welding tungsten tip. so will see. if I need to sort something then i will.

Quote
I wouldn't go with a PLL driver for this.
yeah I need to understand them a bit better first. out of interest why would you avoid one?

Quote
Make sure you have enough primary turns for at least 15% primary detuning.
Thanks I had missed that. I understand spark loading adding capacitance and thus lowering secondary resonance. but I had forgotten to account for that in the primary. is sorted now.

After considering the above, I swapped to 5mm copper tube. shrunk the diameter of the primary a tad. and added a bit to the toroid. (I also remembered to add a floor in, that added some capacitance)
I guess the design goal is upped a bit to 400A-600A peak primary to try and stress these H7 IGBTs a bit (but not too much, at nearly £40 for a full bridge rebuild).

Ultimately it is my first coil so not expecting anything groundbreaking but would like to miss any obvious issues which you have all helped me avoid.

Cheers
Tom

Offline Benjamin Lockhart

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Re: First DRSSTC, Full Bridge PCB & IGBT Selection question.
« Reply #26 on: December 06, 2024, 08:06:27 PM »
If there's any way you could use a larger diameter tube to wind the secondary on, using the same wire, that would help raise the secondary impedance and coupling. The other thing you could do is use thinner wire.

For a small coil especially I'd really try to get the impedance up to 50k or 60k

I'd avoid the PLL driver because the ud2.7 is reliable and well tested. And running at the lower pole makes the biggest sparks in my understanding. Steve Connor used a PLL driver for his DRSSTCs.
I'm not the most knowledgeable about it having never tested one but I seem to recall that there might be a benefit for QCW operation, but not normal DRSSTC operation.

Offline davekni

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Re: First DRSSTC, Full Bridge PCB & IGBT Selection question.
« Reply #27 on: December 06, 2024, 11:33:05 PM »
Quote
I'd avoid the PLL driver because the ud2.7 is reliable and well tested.
PLLs look simple, but can be surprisingly complex and tricky, especially ensuring a stable closed-loop response across all operating conditions of a coil.  If you have experience using PLLs for other low-power circuits, then using one here may be fine.  If this would be your first PLL design, likely difficult.
David Knierim

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Re: First DRSSTC, Full Bridge PCB & IGBT Selection question.
« Reply #28 on: December 10, 2024, 04:18:23 PM »
Quote
If there's any way you could use a larger diameter tube to wind the secondary on, using the same wire, that would help raise the secondary impedance and coupling.
Yeah I was sticking to that tube size because its what I had available. have since caved and seen I can get 1m of 100mm PVC tube for £9 so will just do that.

Quote
I'd avoid the PLL driver because the ud2.7 is reliable and well tested. And running at the lower pole makes the biggest sparks in my understanding.
a very good point about the UD2.7 being well tested. I want to confirm my coil works without also troubleshooting an untested driver.
for the upper and lower pole operation point, As best as I understand it is to do with the interaction between primary and secondary frequency. (I think lower pole operation is where the driving frequency is lower then the primary resonant frequency, and the primary resonance is lower then the secondary resonance.)

This is desirable as when the spark loading detunes the secondary its frequency drops bringing it closer to the resonance of the primary allowing for more energy transfer. as the primary and secondary frequency converge the pole frequency will also start to converge.
if the primary and secondary resonance matches exactly then in theory the upper and lower poles will tend towards infinity (I think) so a PLL driver that exactly matches primary resonance and then tune that primary resonance to match secondary resonance at full spark loading would theoretically give the absolute best results. driving at lower pole probably helps inject extra energy into the secondary before the spark growth adds the required detuning.

Anyway, by no means am I an expert on dual resonant circuits nor the associated pole pair interactions, this was based just on what I could learn from this site and some googling.

The main bit that puzzles me is that whichever driver you use PLL or Ud2.7 the feedback will be based on the primary current waveform via a current transformer and thus will always match the primary frequency. so how do we make it operate below that at the lower pole atall?

In any case is very interesting things to think about and try to get my head round. first one will be a ud2.7 as it would be silly to not make use of all the knowledge around it on a first build.

Revised Java TC parameters attached below as always. I am actually feeling pretty good about these now. its grown a bit in size since the concept phase.





Thanks again for the help and give us a shout if there are any last tweaks that you think will be beneficial before I start designing the 3d.

Offline davekni

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Re: First DRSSTC, Full Bridge PCB & IGBT Selection question.
« Reply #29 on: December 11, 2024, 01:41:52 AM »
Quote
as the primary and secondary frequency converge the pole frequency will also start to converge.
Pole frequency separation is mostly a function of primary-secondary coupling factor, which is fixed.  Both pole frequencies drop with arc loading (with secondary frequency dropping).

Quote
The main bit that puzzles me is that whichever driver you use PLL or Ud2.7 the feedback will be based on the primary current waveform via a current transformer and thus will always match the primary frequency. so how do we make it operate below that at the lower pole atall?
Frequencies can be a bit confusing, so here's an attempt at quick explanation:  For ramped coils or other long enable pulses, coil operation settles out to one pole frequency or the other.  Both primary and secondary current are at the pole frequency, not at individual primary or secondary frequency.  Primary current feedback works at this pole frequency.
Short enable pulses of conventional DRSSTC are a bit more complex.  Initial oscillation is a combination of both pole frequencies simultaneously.  These two frequencies together create an amplitude-modulated current waveform.  Initial part looks like primary frequency, but phase changes as energy transfers to secondary.

With UD2.7 style drivers, operation settles to lower pole frequency as long as primary is tuned below secondary frequency.  Once arc loading lowers secondary frequency below primary, UD2.7 operation switches to upper pole frequency.

Quote
Revised Java TC parameters attached below as always. I am actually feeling pretty good about these now. its grown a bit in size since the concept phase.
Looks good to me!
David Knierim

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Re: First DRSSTC, Full Bridge PCB & IGBT Selection question.
« Reply #30 on: December 11, 2024, 03:48:40 PM »
Thanks. I was clearly miles off with my understanding. with hindsight it makes sense coupling factor would have a large role in pole position.
also makes sense that the coil operates at a pole and not the individual resonances. is a coupled system so is unlikely that it would run at pure resonance of either coil.

cheers for taking time to explain it. is there any more in depth detail available so I can try to get my head round it better?

great news on the java tc coil specs. will get the cad started for that when I get a spare moment. not a lot of time for hobbies currently.

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Re: First DRSSTC, Full Bridge PCB & IGBT Selection question.
« Reply #31 on: December 12, 2024, 01:12:38 AM »
Quote
is there any more in depth detail available so I can try to get my head round it better?
Great ask!  I expected a quick Google search would find lots of examples and explanations, but I'm finding nothing after several attempts.  Hopefully someone else will answer with a good link.

If no one finds a good tutorial, I'd suggest learning analog simulation and playing with two L//C circuits, alone and then with inductor coupling.  Even if a tutorial becomes available, I'd still recommend learning analog simulation.  It's a wonderful way to try circuits without actually constructing (and burning out) any real parts.  Start really simple, a voltage source through a resistor to parallel inductor and capacitor.  LTSpice is my favorite free downloadable simulator.  There are other options including simple on-line simulators that animate current flow.  Simulation is the best way to understand almost any circuit.
David Knierim


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Re: First DRSSTC, Full Bridge PCB & IGBT Selection question.
« Reply #32 on: December 12, 2024, 04:14:03 AM »

 


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