Author Topic: DRSSTC Main Capacitors Topology  (Read 1040 times)

Offline GeorgeTsak

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DRSSTC Main Capacitors Topology
« on: October 20, 2024, 02:21:42 PM »
Greetings HighVoltage Forum users!
I am making my first DRSSTC build, after making a Rotating Spark Gap Tesla Coil and I have a question about the topology of the Main Capacitors.
My Main Capacitor bank will consist of 6 Itelcond Capacitors rated at 350V@3300μF. (2S3P so 700V@9900μF).

I am aware that I must keep the inductance of the DC Bus Bar system as low as possible, to reduce transient voltages. However I cannot seem to find a topology to put these 6 capacitors in a way that the busbars are kept short.
I thought of doing something like this:
(see attached file)

where the capacitors are on their own, and they are connected to the bus using some thick wires.

Will this increase the inductance by a lot? Is it OK?
My setup so far:
IGBT: 2 SKM400 - Half Bridge configuration - Limit will be at ~800Apk due to the MMC.
MMC: 60 CDE 940C20P1K-F (3S20P - 6000VDC@0.666μF). I will probably add more in the future, but I was short on money :')
Main Caps: 700V@9900μF - Input will be max 230V with a voltage doubler @ 16A. I want my specs to be 32A in case I find a source that can provide that power.
Secondary: Completed but not tested yet. Will run at about 30-40KHz

Also one more question. I know that transients are mostly impacted by inductance and current.
Since the capacitors will provide low current (in contrast to the current presented in the IGBTs-MMC), does inductance really matter in these components?

Thank you in advance!

Offline flyingperson23

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Re: DRSSTC Main Capacitors Topology
« Reply #1 on: October 20, 2024, 03:45:45 PM »
All of the current flowing through the IGBTs and MMC flows through the bus capacitor as well. The most important thing is to minimize inductance between the IGBTs and the snubber caps. Inductance to the bus caps is also important, but a wire like that can probably work fine. Keep in mind you'll have about 600V on your bus when loaded and 1.2kV igbts so you have a lot of headroom

Offline GeorgeTsak

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Re: DRSSTC Main Capacitors Topology
« Reply #2 on: October 20, 2024, 07:12:53 PM »
All of the current flowing through the IGBTs and MMC flows through the bus capacitor as well. The most important thing is to minimize inductance between the IGBTs and the snubber caps. Inductance to the bus caps is also important, but a wire like that can probably work fine. Keep in mind you'll have about 600V on your bus when loaded and 1.2kV igbts so you have a lot of headroom

Thank you for your reply! I will use thick cable then, but try to keep it as short as possible. My snubber caps, will be directly mounted to the IGBTs, I don't think I can do anything more to keep this path's inductance smaller.

Offline Mads Barnkob

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Re: DRSSTC Main Capacitors Topology
« Reply #3 on: October 20, 2024, 09:27:09 PM »
Do you have room to put the DC bus capacitors on the side, and then use L formed busbars for connecting the + and -?

My "Professional Paint Illustration" ©, does not show them being apart, but I hope you get what I mean :)

This is about as low inductance you can get, AND still have good space around the IGBTs for mounting all the other stuff.
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Offline klugesmith

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Re: DRSSTC Main Capacitors Topology
« Reply #4 on: October 20, 2024, 11:12:40 PM »
Quote from: GeorgeTsak.
My Main Capacitor bank will consist of 6 Itelcond Capacitors rated at 350V@3300μF. (2S3P so 700V@9900μF).
...
My setup so far:
..
Main Caps: 700V@9900μF
Please review your arithmetic.
« Last Edit: October 20, 2024, 11:14:30 PM by klugesmith »

Offline GeorgeTsak

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Re: DRSSTC Main Capacitors Topology
« Reply #5 on: October 20, 2024, 11:45:26 PM »
Quote from: GeorgeTsak.
My Main Capacitor bank will consist of 6 Itelcond Capacitors rated at 350V@3300μF. (2S3P so 700V@9900μF).
...
My setup so far:
..
Main Caps: 700V@9900μF
Please review your arithmetic.

My bad, two capacitors in series half the capacitance, so I will be 700V@4950μF.

Offline Anders Mikkelsen

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Re: DRSSTC Main Capacitors Topology
« Reply #6 on: October 20, 2024, 11:53:29 PM »
With your wires separated like that, they form a large loop that will have a significant fraction of a microhenry. This is a lot, and bundling the wires together will reduce it significantly. Using multiple wires can also help, but the most critical is to keep the positive and negative as close as practical to reduce the loop area.

All of the current flowing through the IGBTs and MMC flows through the bus capacitor as well. The most important thing is to minimize inductance between the IGBTs and the snubber caps. Inductance to the bus caps is also important, but a wire like that can probably work fine. Keep in mind you'll have about 600V on your bus when loaded and 1.2kV igbts so you have a lot of headroom

This can cause another problem, which is resonance between the snubbers and the electrolytic wiring. With tens of microfarads and hundreds of nanohenries, this resonance can end up near the operating frequency of the coil, allowing voltage to ring up across multiple cycles and exceed twice the bus voltage. In this case, removing the snubbers can make it better, at the cost of L*di/dt spikes. Best is to reduce the inducance to the point where the Csnub*Lwire resonance is close to critically damped by capacitor ESR and away from the operating frequency. RC snubbing across the bus near the IGBTs can also help, but unless the inductance is reduced significantly this can incur a lot of power loss in the resistors.

Offline GeorgeTsak

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Re: DRSSTC Main Capacitors Topology
« Reply #7 on: October 21, 2024, 12:30:57 AM »
Do you have room to put the DC bus capacitors on the side, and then use L formed busbars for connecting the + and -?

My "Professional Paint Illustration" ©, does not show them being apart, but I hope you get what I mean :)

This is about as low inductance you can get, AND still have good space around the IGBTs for mounting all the other stuff.

I actually don't have space restrictions, since I haven't designed the enclosure yet. I wanted to get over with the topology of the components first just in case the circuit got bigger than I expected.
You mean to make the busbars like this? (I hope you understand my sketch. Doing 3D lines in paint is not easy :') )

Offline GeorgeTsak

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Re: DRSSTC Main Capacitors Topology
« Reply #8 on: October 21, 2024, 12:36:43 AM »
With your wires separated like that, they form a large loop that will have a significant fraction of a microhenry. This is a lot, and bundling the wires together will reduce it significantly. Using multiple wires can also help, but the most critical is to keep the positive and negative as close as practical to reduce the loop area.

All of the current flowing through the IGBTs and MMC flows through the bus capacitor as well. The most important thing is to minimize inductance between the IGBTs and the snubber caps. Inductance to the bus caps is also important, but a wire like that can probably work fine. Keep in mind you'll have about 600V on your bus when loaded and 1.2kV igbts so you have a lot of headroom

This can cause another problem, which is resonance between the snubbers and the electrolytic wiring. With tens of microfarads and hundreds of nanohenries, this resonance can end up near the operating frequency of the coil, allowing voltage to ring up across multiple cycles and exceed twice the bus voltage. In this case, removing the snubbers can make it better, at the cost of L*di/dt spikes. Best is to reduce the inducance to the point where the Csnub*Lwire resonance is close to critically damped by capacitor ESR and away from the operating frequency. RC snubbing across the bus near the IGBTs can also help, but unless the inductance is reduced significantly this can incur a lot of power loss in the resistors.

That's an intersting observation, I will keep an eye on it. I will do measurements once I build the circuit to check it out.
« Last Edit: October 21, 2024, 10:55:28 AM by GeorgeTsak »

Offline Mads Barnkob

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Re: DRSSTC Main Capacitors Topology
« Reply #9 on: October 25, 2024, 10:52:23 PM »
Do you have room to put the DC bus capacitors on the side, and then use L formed busbars for connecting the + and -?

My "Professional Paint Illustration" ©, does not show them being apart, but I hope you get what I mean :)

This is about as low inductance you can get, AND still have good space around the IGBTs for mounting all the other stuff.

I actually don't have space restrictions, since I haven't designed the enclosure yet. I wanted to get over with the topology of the components first just in case the circuit got bigger than I expected.
You mean to make the busbars like this? (I hope you understand my sketch. Doing 3D lines in paint is not easy :') )

yes, but no need for the yellow to go horizontal. Just have 3 strings of 2 series, add balancing/bleeder resistors ( https://kaizerpowerelectronics.dk/tesla-coils/drsstc-design-guide/dc-bus-capacitor/ )
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Offline Benjamin Lockhart

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Re: DRSSTC Main Capacitors Topology
« Reply #10 on: October 25, 2024, 11:13:29 PM »
You would need the yellow wire to connect horizontally if you're using the caps as a voltage doubler.

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Re: DRSSTC Main Capacitors Topology
« Reply #10 on: October 25, 2024, 11:13:29 PM »

 


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