Analog DRSSTC interrupter duty cycle limiter

[Benjamin Lockhart]

Hi, I'm designing an analog interrupter and I could use some help with the duty limiter circuit.
So far it's all in falstad simulation, but I have parts to breadboard it.

The output stage is a monostable 555 and I'm sending the output pulses through a low pass filter to get a dc average of the duty cycle. If the peak is 10V, and I want 10% max, then once the voltage from the filter gets close to or exceeds 1V I should start shortening the pulse width.

The circuit is running on 12V and it's configured so that the 555 timer CV pin5 is normally at 8V with no effect on the pulse width. If it drops to 6V the pulse width is almost zero, and it's linear in between.

What I think I need to do is convert the 0V-1V signal to a 8V-6V signal (inverted), which can be done with op amps.

But, I don't want the filter output to start having any effect on the CV input until it reaches say 0.8V, somewhere just bellow the duty cycle limit. Then the circuit should start dropping the voltage until the hits 6Vout at 1Vin (almost zero pulse width). The 1V threshold needs to be adjustable for setting the limit as well.

I'll keep you all updated on the progress as I'm very excited about this project.
Thanks, Benjamin

[davekni]

But, I don't want the filter output to start having any effect on the CV input until it reaches say 0.8V., somewhere just bellow the duty cycle limit. Then the circuit should start dropping the voltage until the hits 6Vout at 1Vin (almost zero pulse width). The 1V threshold needs to be adjustable for setting the limit as well.

Opamp amplifier circuits can have offset as well as gain.  You could connect opamp output through a diode to pin 5 so that it can only reduce voltage, not increase it.  Then chose gain and offset so opamp is at 8.6V with 0.8V input and 6.6V with 1.0V input.

[Benjamin Lockhart]

Thanks, I tried this and it worked but it would oscillate around the response frequency of the low pass filter.

Adding a capacitor into the feedback loop of the op amp to make it a leaky integrator would get rid of the oscillation if the cap was big enough, but the whole thing still had about a 20-30ms response time (with a 90Hz cutoff low pass filter) before it would bring the duty cycle back down.

I also just tried removing the low pass filter completely since a leaky integrator is already a 1st order low pass filter and it still works! The slight ripple doesn't seem to matter and there's no oscillation so I can make the integrator cap a lot smaller which brings the response time down to less than 4ms!

I think the short duty spike will be acceptable in practice considering that long pulse coils often run on-times that high.
Here's a falstad simulation of the circuit. http://tinyurl.com/yme4bnjk

Can you see any improvements I could make? One thing I don't like is that I need to reduce the positive rail voltage to the integrator so it can't output more than +2volts in order to keep the response time as quick as possible. Is there a better way to limit the max output voltage from the op amp without affecting the rest of the circuit?

[davekni]

Can you see any improvements I could make?

Of course there are many ways to achieve roughly the same end result.  Building what you have is a great way to learn even if there may be simpler options.

One variation to consider implements cycle-by-cycle duty limiting.  Make timing capacitor discharge a controlled current rather than rapid.  If the interval between interrupt input pulses is short, cap isn't fully discharged, so will require less time to charge to threshold, shortening enable pulse width.  Discharge current would need to track charge current, such as complementary current mirrors with POT between the two mirror inputs.

Is there a better way to limit the max output voltage from the op amp without affecting the rest of the circuit?

Limiting opamp integrator (or low pass filter) output voltage isn't easy when + input voltage varies as in your circuit.  If + input voltage is fixed, then a diode (or diode in series with shunt regulator or multiple diodes or LED for higher voltage drop) from output to - input works for clamping.  You could change to have fixed + input and adjust bias current into - input.

[Benjamin Lockhart]

I just tried it with the plus input fixed and bias current and clamping diodes to the minus input, but the leakage current through diodes is changing the clamping voltage based on the bias current. So it only works at one specific limiter setting which is no good. Edit- I mostly figured this out.

Directly clamping the output to a reference with a diode and resistor to limit current doesn't work great either for the same reason.

Is there anything wrong with just lowering the positive rail voltage to the integrator so it hits saturation at 2V, aside from having to make a separate supply for it?

I will explore the cycle-by-cycle option as well!

[Benjamin Lockhart]

I tried some more things and got it mostly working.
http://tinyurl.com/ytadt3r2

The clamping voltage is still dependent on the duty cycle setting somewhat, but it's not too bad. Since the duty cycle limit is now current controlled rather than voltage controlled, it needs a log potentiometer. but it still seems to work. I don't really see a better option here.

I don't think a cycle-by-cycle limiter will work in this case because I'm going to combine the outputs from three separate 555 timers with different inputs to make a phaser effect, and the duty limiter needs to average the total output from all three, including unevenly spaced pulses.

It seems like I need a 3.3V drop diode to make it settle around 2V (with no input signal to the 555) when the + input is referenced to 0V. Would a shunt regulator work better here?

Thanks, Benjamin

[davekni]

Is there anything wrong with just lowering the positive rail voltage to the integrator so it hits saturation at 2V, aside from having to make a separate supply for it?

For this method I'd suggest a rail-to-rail output opamp.  Otherwise you will find that the voltage drop between supply and max output may not be stable with temperature or opamp bias conditions.  For your low-frequency use, issues with opamp recovery from over-drive aren't a significant concern.

Since the duty cycle limit is now current controlled rather than voltage controlled, it needs a log potentiometer. but it still seems to work.

If linear was sufficient for voltage adjustment, it's not clear why it wouldn't be for current.  Perhaps it's because the 10k resistor from POT wiper is too small.  Make it larger to define maximum duty cycle when POT is adjusted to its limit, presuming you are not after 100% capability.

It seems like I need a 3.3V drop diode to make it settle around 2V (with no input signal to the 555) when the + input is referenced to 0V. Would a shunt regulator work better here?

Use a small positive voltage for integrator + input rather than 0V.  Set that positive voltage to one diode drop below 2V.  Top lead of POT will then need to go to a positive voltage too, such as through a resistor to +6V.

[Benjamin Lockhart]

No I'm not after 100% capability on the duty cycle limit. It goes to about 23% with the 10k POT which is lots, and I can increase it if I need a higher limit.

I just tried referencing the + input higher than 0V and it causes the whole thing to act as a duty cycle attenuator rather than a hard limit! The output increases based on the duty cycle from the timer so that's no good.

The 10k resistor on the POT wiper needs to be close to the same value as the other input resistor coming from the 555 for reasons not quite clear to me.  If it's smaller than 10k the output tries to swing below zero volts which is undesirable because that adds extra slewing time.
The 10k resistor sets the integrator output at 0V when the POT is at min resistance (minimum duty cycle).
I've also added reverse diodes to the integrator feedback to prevent it from dropping very much below 0V.

I also realized I can get rid of the precision rectifier since the whole loop will compensate for the diode drop into the CV pin.
Here's an updated sim that is behaving as well as I can get.
http://tinyurl.com/yn866zd7
I've also added a diode and pull-down resistor to the timer output so I can parallel multiple timers without their outputs conflicting.

The sim also predicts that 4x 1n4148 in series will work to keep the voltage close enough to +2V maximum. I'll measure this when I build it.

Again, thanks for all your help!
Benjamin
     Edit- Why does it also still work exactly the same without the 100k resistor in the feedback of the integrator??
http://tinyurl.com/yuq6mfth

[davekni]

Edit- Why does it also still work exactly the same without the 100k resistor in the feedback of the integrator??

Almost the same, but not quite.  Without 100k, DC gain of your limiter control loop is almost infinite.  Set limit to 10%.  Input 11% or 50% and long term output average will be almost exactly 10%.  With 100k, output average will change some as input duty cycle increases above limit.

[Benjamin Lockhart]

Ok thanks, this makes sense.