160mm DRSSTC II project | Questions

[Late]

Adjustable coupling secondaries are very useful. I usually build a geometry that gives high coupling, then raise the second secondary with various height spacers to lower the coupling. Maximum coupling without racing sparks is dependent on coil parameters. Make sure the inner turn of your primary isn't too close to your secondary and you should be fine.

Your bus design is very low inductance, but may be prone to arcing over, depending on how you design it. Running at 565Vbus, you have more headroom for high inductance bus design than at 850V. If I were you, I'd keep at least 5-6mm between + and - so it won't arc over even if you get big voltage spikes or conductive dust blown around.

The 2mm was chosen bc i have some 2mm self-made fiberglass material on hand. Ill just glue together 2 layers to get 4mm and that should be sufficient distance between the plates.

And talking about the coupling ill check how close it is to secondary. I have a feeling it may be bit too close in my current plan.

[Benjamin Lockhart]

I used 1mm fr4 fiberglass for my new double bridge but I made sure there was at least 6mm sticking past all the edges. I believe the dielectric strength of thinner material is just fine.
My DRSSTC3 is also done this way and I've had no problems with it.

[Late]

I haven't had much time to continue the DRSSTC project in the past months due to full-time studies and a full-time job. Recently i have gotten some free time so i have continued to source parts and plan it further. After some thinking I've decided to use the UD+ freewheeling driver in this coil build instead of the originally planned my own version of UD2.9 SMD.

However for the UD+ driver i also plan to make my own PCB with a few modifications replacing some obsolete parts and parts that cant be easily acquired anymore. And I've incorporated some improvements such as replacing the adjustable inductor used for phase lead with a set value inductor and a potentiometer as is commonly done to UD2.7 drivers for phase lead.

Heres the schematic i have currently come up with:



Is there anything else i should improve or do differnently in this driver?

[davekni]

Is there anything else i should improve or do differnently in this driver?

Double check your second page wiring from driver chips to FETs.

I'd suggest a couple value changes as well.  R12 would be better with a lower value such as 10 ohms to provide more range of phase lead.  And C10 should be left off or be a smaller value.  As is adds almost 1us of phase delay, more than can be compensated be preceding phase lead circuit.

[Mads Barnkob]

Instead of UD+, I would suggest going with UD3.1 as there is a community around developing it further: https://github.com/Netzpfuscher/UD3/wiki

[futurist]

I use UD+ in all of my coils and I'm happy with it, but I have to agree with Mads
UD+ never caught on, even back then it relied on an almost obsolete CPLD

Beside obsolete CPLD, I don't think you can download programming software anymore, even 6-7 years ago when I did it it was pain in the ass. I still have the software installed on an old laptop and I'm hoping that the laptop won't die anytime soon. Back then CPLDs were already not available on digikey/mouser, so I bought mine on eBay, they were brand new, but preprogrammed with something and thus very cheap. If you need any help with UD+ or you need some parts I'd like to help

[Late]

I use UD+ in all of my coils and I'm happy with it, but I have to agree with Mads
UD+ never caught on, even back then it relied on an almost obsolete CPLD

Beside obsolete CPLD, I don't think you can download programming software anymore, even 6-7 years ago when I did it it was pain in the ass. I still have the software installed on an old laptop and I'm hoping that the laptop won't die anytime soon. Back then CPLDs were already not available on digikey/mouser, so I bought mine on eBay, they were brand new, but preprogrammed with something and thus very cheap. If you need any help with UD+ or you need some parts I'd like to help

The only thing i dont like about the UD3 is that you need an computer to run the coil. But i will check it out more than i already have.
Last time i checked both mouser and digikey had quite a sufficient stock of that CPLD used in the UD+

[Late]

Is there anything else i should improve or do differnently in this driver?

Double check your second page wiring from driver chips to FETs.

I'd suggest a couple value changes as well.  R12 would be better with a lower value such as 10 ohms to provide more range of phase lead.  And C10 should be left off or be a smaller value.  As is adds almost 1us of phase delay, more than can be compensated be preceding phase lead circuit.

Yes i already noticed the wiring mishap with the fets. Its been fixed now. Ill update the values you suggested.

[Late]

Ive now fixed all the issues and have implemented the improvements into the schematic and have drawn a PCB for the driver. Originally i thought that it may need to be a 4 layer board but in the end i managed to easily do it in 2 layers. Have changed the gate driving mosfets for some newer better ones and have added the possibility to bolt on a small heatsink to help cool those fets.

Let me know if i should improve anything!

[Benjamin Lockhart]

Might not be significant, but the UD+ has a 0.1uF cap across the bottom resistor of the UVLO divider R34 in your schematic.

[futurist]

Also one insignificant thing - R32 and R36 should be 2k

Back in 2017 when I started using UD+ I noticed that OCD LED and SIG LED were barely visible
Hydron did some modifications in Phil's VHDL code, particularly OCD LED and SIG LED latches to make them more visible, and since he didn't have UD+ I tested the code
The problem was he had to use startup oscillator for latch, and the duration varied when you changed the startup oscillator frequency. Solution would be to add one more LC oscillator for latches

He was also working on UVLO modification so it can activate in the middle of the burst, I don't remember how that went.. I also don't remember if Phil added any of these modifications on git
I'll try to dig up the code. The whole thing was done on 4hv IRC channel, few of us were active back then

[Late]

Also one insignificant thing - R32 and R36 should be 2k

Back in 2017 when I started using UD+ I noticed that OCD LED and SIG LED were barely visible
Hydron did some modifications in Phil's VHDL code, particularly OCD LED and SIG LED latches to make them more visible, and since he didn't have UD+ I tested the code
The problem was he had to use startup oscillator for latch, and the duration varied when you changed the startup oscillator frequency. Solution would be to add one more LC oscillator for latches

He was also working on UVLO modification so it can activate in the middle of the burst, I don't remember how that went.. I also don't remember if Phil added any of these modifications on git
I'll try to dig up the code. The whole thing was done on 4hv IRC channel, few of us were active back then

To which pins would the extra oscillator need to be connected to?

It would be great if you could find the latest code. Ill likely need help with programming it although i dont expect it to be that hard.
Also would you still happen to have the old software for programming the FPGA?
Also link to the 4hv post would be great, thanks.

[Late]

Had some free time on hands so i sat down and started drawing all the parts needed for the laminated bus in Onshape. Have also wound the CTs and GDTs for the coil on some N30 cores with some nice flexible silicone wires. 26AWG for the cascaded CTs and 22AWG for the GDT. The silicone wires in my opinion look so much better than just plain CAT5 and should also have significantly better insulation. Also started laying out the parts i have on hand in real life so i can picture better how it will go together. Also created and 3D printed adapter so i can panel mount an 32A 3 phase plug.

Here are the layout pictures:








Here are the laminated bus and MMC parts i plan to CNC cut:








At first i wanted to make the insulator parts myself from some fiberglass sheets but the i remembered that JLCPCB offers pretty cheap PCBs and FR4 is a pretty good insulator so i decided to go that route. To be safe ill be doing 2 1.6mm PCBs as insulator between GND and VCC layers of the bus and a single 1.6mm PCB between GND bus layer and the capacitor middle point. And to make the assembly easier the capacitor middle point insulator also has the bus cap balancing/discharging resistors on it. For those i chose 4  2W SMD 33k resistors in 2s2p across each of the caps. They should provide good discharge rate and are overrated enough in power to not cause any issues.




And here finally is the BUS in assembly view:






I think the coil is coming together pretty nicely and should look amazing in the end as i plan to make the frame with transparent 4mm PC sides. Whole frame is gonna be made from 3030 alu profiles as i already planned in the beginning. The frame will also have some nice adressable LED strip ran along few if not all sides so it should look epic in the dark.
For the primary, MMC and primary tap connecting wires im going to use a very nice super flexible 35mm2 silicone wire. Its a dream to work with and should allow for easy tunning and the thick crossection will help with the wire heating up during long runs. Yesterday tested how well the fans cool the heatsink and my god are those fans powerful. I heated up the heatsink to around 50-60C with a heatgun and those fans cooled it down in no time!.

Only thing not seen in the assembly pictures is where the fiberoptic input and power input for the driver but those go on the front side next to the 3 phase 32A mains input. I plan to also add a circuit breaker next to the outlet. The mains wires are 6mm2 silicone wires.

As always if you have any questions or notice anything i should improve let me know!

[futurist]

To which pins would the extra oscillator need to be connected to?

It would be great if you could find the latest code. Ill likely need help with programming it although i dont expect it to be that hard.
Also would you still happen to have the old software for programming the FPGA?
Also link to the 4hv post would be great, thanks.

I don't know about the oscillator, we have to ask Phil or Hydron

I thought I had the VHDL on email somewhere but I can't find it. I surely have it on the laptop I used for programming, but I can't get it until the weekend

Programming itself isn't hard, but I had problems installing Xilinx ISE. I couldn't get it running on Debian, and I had some problems installing it on Windows 10. It took forever to install and the whole thing takes 15+ GiB of storage
You should be to able to download it here https://www.xilinx.com/support/download/index.html/content/xilinx/en/downloadNav/vivado-design-tools/archive-ise.html

The bridge looks fantastic!

[Late]

I don't know about the oscillator, we have to ask Phil or Hydron

I thought I had the VHDL on email somewhere but I can't find it. I surely have it on the laptop I used for programming, but I can't get it until the weekend

Programming itself isn't hard, but I had problems installing Xilinx ISE. I couldn't get it running on Debian, and I had some problems installing it on Windows 10. It took forever to install and the whole thing takes 15+ GiB of storage
You should be to able to download it here https://www.xilinx.com/support/download/index.html/content/xilinx/en/downloadNav/vivado-design-tools/archive-ise.html

The bridge looks fantastic!

How could I get in contact with Phill or Hydron to ask them about it?
All of this isn't time sensitive so whenever you get the chance would be amazing if ou could share the code and software. Sometimes this week I'll try to download the software on my old laptop.
Will let you know how it goes.

[futurist]

Found the vhdl!

You need to adjust led_latch_cycles constant based on your startup oscillator frequency. I don't remember the range

[Late]

Found the vhdl!

You need to adjust led_latch_cycles constant based on your startup oscillator frequency. I don't remember the range

Thanks, will check it out.
This week i got some time so i finished drawing all the PCBs and the laminated BUS parts and ordered them. Will let you know if i run into any issues when i get the boards assembled