What is skip pulse operation?

[profdc9]

I was reading and trying to understand what skip pulse operation is of a DRSSTC.  My understand is that ordinarily when the overcurrent detection occurs, the transistors are shut down when the next zero current crossing occurs, and the current in the half/full bridge is allowed to ring down by circulating through the freewheeling diodes.  With skip pulse operation, instead of having the transistors shut off until the next trigger comes from the interrupter, it allows the current to ring down until the current has dropped below the overcurrent level, and then the transistors to switch back on to allow the current to build up again, and this continues until the interrupter shuts off the pulse.  I could not find a schematic for a skip pulse operation, so I decided to study it myself.

I was playing around with the schematic of the universal driver to try to implement this (if this is indeed what skip pulse is).   The schematic I included rearranges a few things in the universal driver to do this but hopefully keeps the part count about the same.  In the old universal driver, the D-type flip flop U7A has its set input along as the interrupter pulse is active, unless it is shut off by ANDing with the output of the other flip-flop U7B, which is driven low if there is an overcurrent condition.  Each time the signal from the feedback transformer transitions from low to high, it would clock in a low signal, but this is overridden by the interrupter pulse (assuming it is still active and there's no overcurrent condition).   Once the interrupter pulse is over or overcurrent occurs, the feedback from the comparator clocks in a low signal at the low-to-high feedback transformer transition, shutting off the transistors.

I changed this by only applying a short negative pulse to the set input when the interrupter pulse transitions from low to high, the short pulse being generated by the network of U8C, so that the AND gates U5B/U5C allow the transistors to clock on.  Instead of the data input to U7A always being low, it is high as long as the interrupter pulse is active and there's no overcurrent condition.  Jumper J16, if it is closed, forces flip-flop U7B low which shuts off the AND gate and so the next low-to-high transition of the feedback transformer shuts off the transistors, and the transistors stay off until the next rising edge of the interrupter pulse, which is the usual non skip-pulse operation.  If jumper J16 is open, the transistors stay off only until the overcurrent condition is ended, and on the next low-to-high transition of the feedback transformer, the transistors are enabled again, and if overcurrent keeps happening, this cycle should continue until the interrupter pulse is shut off.  However, I kept the circuit that shuts off the transistors in case it doesn't otherwise occur from the interrupter pulse ending.

Anyways,  if someone could help me figure out what functionality embodies skip pulse DRSSTC I could work that into the design, in a way like I have modified the driver above.

Thanks,

Dan

[futurist]

Check out this thread
http://4hv.org/e107_plugins/forum/forum_viewtopic.php?178230

And Phil's UD+ page
http://classictesla.com/pslawinski/udplus.html

[profdc9]

One question about skip pulse operation:

Do you have to alternate between turning one leg of the half bridge off, or can the bridge be shut off completely to freewheel, and then turned on again when the current drops below the OCD threshold?

Dan

[Hydron]

Turning off either half or the whole bridge works. The only reason that the "off" leg is alternated is to even out losses between each half of the bridge. In some cases the freewheeling diode (used in the leg which is off) may be the limit rather than the IGBT, as they will normally have a smaller die.

With both halves of the bridge off the primary current will fall faster than with just one half off - effectively you're draining the energy in the primary system back into the bus capacitors rather than just circulating it around without much loss. While both ways will do the job, the all-off version only needs one GDT and is slightly simpler, but will likely generate larger changes in primary current. I have no idea whether there would be any visual difference, or if there is, which looks/sounds better - it would be nice to see both tested on the same coil to compare!