Through-hole layout of UD2.7C universal driver

[profdc9]

Hello,
I am working on a through-hole layout of the UD2.7C universal driver board.  I am nearly finished, except for there is no equivalent of the LM8365 that is not surface mount.  Is there a good alternative?

Also, since I am new to this, maybe someone could take a look at the layout?   I prefer to use through-hole components if I have to build stuff at home, not having a reflow oven.

I used Kicad to make the schematic, so anyone can download and modify it (you don't need Eagle).

I can send the Kicad file if someone wants to take a look at the PCB layout in PCBNEW.

Thanks,

Dan

[Hydron]

It's probably easy to find an alternative method to the LM8365 which is both through hole and works better as well.

This particular part was picked due to convenience more than anything else, I wanted an UVLO in my driver and modded the UD2.5 layout to include it, and the LM8365 was a) easy to use with just 3 extra parts and b) I had one in my box of random ICs.
Loneoceans then included and improved it in his UD2.7 design (along with good documentation and other improvements - thanks!).

There is a limitation to doing it the quick and easy LM8365 way - when the 24V supply rail gets really low (e.g. 8V or lower) the chip can stop working, which means the UVLO will stop working and the driver can still try and switch the IGBTs, putting them at risk. To solve this (and enable through hole construction) I would suggest you use a comparator like the LM311 (already in use for OCD), and have it sensing the 24V supply on one input, and a zener or similar reference on the other, placed in parallel with the OCD LM311 output. The LM311 will run down to 3.5V or so, which is low enough that the IGBTs won't be turning on anyway, and can be powered by the 24V supply to make the circuit as simple as one resistor, one potentiometer, a zener diode and the LM311 (maybe plus decoupling cap). See my MSPAINT drawing for an idea of what to do:

[profdc9]

Thanks for your reply.  I found the following:  MC34164-3G

https://www.onsemi.com/pub/Collateral/MC34164-D.PDF

which should do it I think, though the maximum voltage is 12 V for this part, so I am adding a resistor so that the limit of the divider is 12 V regardless of how the potentiometer is turned.

Do you know if there's anything special about the layout?  I made sure to keep the hysteresis loop components small on the comparator (TL3116) and made the traces relatively fat from the outputs of the gate drivers and FETs.  However, through-hole components are going to have more inductance due to the longer traces between the components.  Any ideas on potential layout problems?

Dan

[Hydron]

The MC34164-3 will work similarly to the LM8365, but will share the problem of failing to prevent operation once the supply falls a long way. Your idea of putting adding resistor is 100% correct, people have made the mistake with the pot before and the same fix has been suggested.
There may be a way to combine protection for >12V input and the low voltage issue (likely involving more resistors and zener diodes), but I haven't thought it through properly.

Regarding the layout, I haven't had time to look at your circuit properly sorry. Nothing is too critical with this circuit though, so you should be OK.

[profdc9]

Please indulge my further questions...

So I was thinking of changing the output stage to use discrete MOSFETs rather than two sets of FDD8424H drivers to save some space on the board.  How necessary is it to have two sets of drivers?  I would only need one UCC27423, and I could use the following MOSFETs: 

IRF3205PBF   (http://www.irf.com/product-info/datasheets/data/irf3205.pdf)   (N-channel, 55V, 110A drain current)
IRF4905PBF   (https://www.infineon.com/dgdl/irf4905pbf.pdf?fileId=5546d462533600a4015355e329b1197e)
      (P-channel, -55 V, -74A drain current)

I think these peak currents should be enough to supply even four of the biggest IGBT bricks.  IRF540/IRF9540 could be substituted of course.  I would still have two outputs with two sets of series capacitors.

Also, could I run the UCC27423 at 15 V rather than 9 V?  I would think driving the MOSFET gates at a higher voltage would switch them faster.  The voltage regulator would run cooler as well, only having to drop from 24 V to 15 V rather than to 9 V.

The data sheet for the MC34164-3 says that "guaranteed operation down to 1.0 V."  I thought this to mean that the reset line is guaranteed to be pulled low down to that supply voltage.  Is this not true, or is this not sufficient to guarantee that the gate driver remains off?

Thanks,

Dan

[Hydron]

If you want to swap mosfets then yes it will work with only one output stage, the second one isn't normally used unless you're driving multiple sets of IGBTs.

I would check the gate charge specification of the new parts against the old, make sure they aren't too much higher (2-3x higher is probably OK, but you don't want to go crazy).

As for running at higher than 9V, I wouldn't go all the way to 15 (getting close to max rating of the driver) but 12V is perfectly fine (is what I'm using).

The "operation down to 1V" refers to the voltage at the input pin, which is used for both power and sensing. If you've used a voltage divider to drop down from 24V then it will also reduce the input voltage below 1V at some point (probably around 8-10V depending on your trip point setting). This is not ideal as it means the driver could start up again at that point. It may be possible to stop this happening but I haven't worked out a circuit yet.

[Mads Barnkob]

I can only recommend IRF540/IRF9540 which are the ones I used in my single-sided drivers, they had no problems driving 3x SKM145 IGBT bricks in parallel at 100 kHz, 5000us on-time, good square waveform, if you want more details you can check out some of the measurements here: http://kaizerpowerelectronics.dk/tesla-coils/kaizer-drsstc-iv/

Putting all your linear voltage regulators in series is properly not a good idea, unless the parallel diode is to prevent overloading regulators first in the chain, but with a mere 1A power budget of each, the 24V regulator is getting pushed.

I found it nice to add jumpers to be able to disable pulse-width limiting feature and also to be able to reverse the polarity of the optical input, so you can switch between different output topology optical receivers.

[profdc9]

Could you suggest where to add the jumper to disable the pulse-width limiting feature and to reverse the polarity of the optical input?  I attached the PDF of the schematic so you can refer to the components.

Thanks,

Dan

[futurist]

PCB looks nice so far! Don't forget to add mounting holes 

[profdc9]

Ok, I think I added the features:

Jumper J14 shorts out capacitor C21 to disable pulse-width limiting.
Jumper J15 allows the IFD95 optical receiver to use an inverted or noninverted signal, or it is left off if the IFD95 is not connected.
Jumper J7 allows undervoltage to be turned on and off.
Jumper J9 is a test point for OCD level, OCD current for the scope, and a ground connection.
Jumper J6 is phase control
Connectors J3 and J4 either allow a Coilcraft Slot 7 inductor to be soldered to the board, or a hand wound inductor to be connected.
Power is now 12V rather than 9V for the gate driver.

The mounting holes are designed to that a second board that is a full bridge for four TO-247s will stack on top of this one using four M3 standoffs.

It fits in 10 by 10 cm so it can be made for $5 at Seeedstudio  or other cheapo PCB manufacturers.

I think its nearing completion.  If someone could check a few of these things, I would appreciate it.

This has been a neat learning process to learn how to lay these boards out.   I will send the Kicad file out when I'm done. Kicad is free software so anyone can edit the board.  I think this board should be very hackable.

Thanks,

Dan

[Mads Barnkob]

You already guessed that bridging over the capacitor is enough to disable the pulse width limiter, so that is fine.

When it comes to the inverting/non-inverting of the optical input, remember to make it possible to tie the unused hex schmitt trigger inverter inputs to ground, else you will get in trouble with crosstalk inside the IC.

[Max]

Hi profdc9,

I wanted to play around with the layout, however, I can't open the project in the current version of KiCad (5.1.9). It seems like part libraries are missing. I don't know how libraries worked in older KiCad versions but in the current ones you should definitely add project specific parts to a separate, project specific library.
Anyways, before spending hours with sourcing the components and footprints you used, could you migrate the project to the current KiCad version and inlcude a library with all the symbols and footprints?
I reported this as an issue on GitHub, too, but didn't know whether you have your notifications turned on.

Thank you!
Max

[profdc9]

I just loaded the file into kicad 5.1.8 and the library symbols were migrated over it seems without any problem and the design rule check worked with only minor issues like courtyard overlapping (which just means the components are a little close in places).

Could you let me know which library symbols or footprints are missing?

Hi profdc9,

I wanted to play around with the layout, however, I can't open the project in the current version of KiCad (5.1.9). It seems like part libraries are missing. I don't know how libraries worked in older KiCad versions but in the current ones you should definitely add project specific parts to a separate, project specific library.
Anyways, before spending hours with sourcing the components and footprints you used, could you migrate the project to the current KiCad version and inlcude a library with all the symbols and footprints?
I reported this as an issue on GitHub, too, but didn't know whether you have your notifications turned on.

Thank you!
Max

[Max]

It seems as if the standard parts like the logic chips migrate without issues. but the optical receivers f.ex. don't. Hence I suspected that you didn't add those symbols and footprints to a project library, but to your system library which is not part of the git repository - and thus not available to me.
The optical receivers are the only thing I can remember right now. If this is not enough to track down the origin of the issue, i can make a complete list.

Kind regards,
Max

[profdc9]

The optical receivers are in the cache library.  If you recover the project it will find them, but probably they should be in their own library.   But I think the library symbols you are looking for are in the project cache library.

Dan

It seems as if the standard parts like the logic chips migrate without issues. but the optical receivers f.ex. don't. Hence I suspected that you didn't add those symbols and footprints to a project library, but to your system library which is not part of the git repository - and thus not available to me.
The optical receivers are the only thing I can remember right now. If this is not enough to track down the origin of the issue, i can make a complete list.

Kind regards,
Max

[Max]

Hmmm okay... i‘ll try again and report here.

[Max]

Ok I managed to migrate it. Apparently KiCad changed the library naming conventions. "Resistors_THT" f.ex. became "Resistor_THT". In fact, the project specific parts were the only ones that ended up working as expected. This made it necessary to modify all the footprint assignments. No other issues though. While working, the migration is not really clean; pretty much all standard symbols like "+24V" are taken from the rescue library instead of the build-in library. Maybe some day I'll be bored enough to change those, too. For now I'll give the layout a try and see what I can come up with. There are a couple things I would change in the schematic but for now I'll consider that one as "known working" a.k.a. "don't touch".

My work can be found here for now: https://github.com/MMMZZZZ/DRSSTC-PCB-Pack
Once I'm done I'll probably create a pull request.


Thanks for the support,
Max

[profdc9]

You might want to consider trying the ud29 design as that includes skip pulse functionality with very few changes from ud27.

[Max]

Too late layout done. The nice thing is, this layout can be manufactured as single or double sided pcb (a.k.a. made at home or ordered). The top layer only contains a hand full of jumper wires with vias large enough for actual wires. Other improvements are that all TO220 parts can now be mounted on a single heatsink (all located on the same edge of the PCB), all inputs are on the left side, optical receivers and status LEDs are on the front edge, and the GDT output is on the right side. Test points are on the edges of the PCB, too.

I also created an Interactive BOM, which should be a great help during assembly and potential debugging. Here‘s the link to the awesome KiCad plugin for generating those iBOMs.

Link to my version: https://github.com/MMMZZZZ/DRSSTC-PCB-Pack/tree/master/ud27c%20thru%20hole#readme


Kind regards,
Max

[profdc9]

When laying out the board, it was impressed upon me (by G. Guangyan the creator of the ud27c SMT board) that I should have very wide traces from the IRF540/IRF9540 source leads and the 24 volt bus capacitors.  This is because in order to switch the MOSFETs rapidly the edge of the gate drive signal will likely have to be 100 ns or less in duration which requires a large peak current especially for big IGBT bricks.  On this board and the ud29 version of the board I had a GND/+24 V fill around these to ensure that there would be a very low resistance/inductance path from the bus capacitors to the MOSFET sources.    There are also ceramics very close to the MOSFETs to provide extra low impedance charge which seems to be there in the new layout.  This was a major constraint on the layout, but I think you should do this as well.   It is also important to keep signal lines as short as possible, especially for paths like the positive feedback (hysteresis) in the high speed comparator.    Otherwise it could either act too slowly or it could oscillate.  I think it is more important for a layout to have there properties than it is to be a single layer because it is so easy nowadays to have boards manufactured.  Long curvy paths to keep the traces from crossing on a single layer are likely not as good as short wires that cross each other on opposite layers at right angles.  Also it is crucial that decoupling caps have definitely short, local traces to the chips that they are supposed to decouple the supplies for.  Since it looks like most of the top layer is ground, that is likely not a problem.

Also, if you do intend the board to be used with links on a one-sided board, you should change the vias to have a wider copper gap around them because there will be no solder mask to prevent bridges between the link pads and the surrounding copper fill.

The layout is definitely in some ways better than mine, but I think it has to ensure that the sharpest edge can be delivered through the gate drive possible.

Dan