DRSSTC No Breakout On Topload

[Dhaygoh]

Hello,

This is my first attempt at a DRSSTC. I am unable to generate a spark from the breakout wire placed on top of the toroid (difficult to see in the video, but it is there). However if I hold a metal wire about 6" from the secondary and halfway up its length, I get what you see in the video below.

Any suggestions would be greatly appreciated, thank you!

Some additional information:

Secondary Tank Circuit

Secondary Inductor:
- 20" wound length,
- 3.5" outer diameter (PVC)
- Inductance: 19.83 mH ( ESR 47.93 Ohms )

Topload:
- Spun aluminum toroid

Measured Secondary Resonant Frequency (fsec): 264 kHz

Primary Tank Circuit

MMC Capacitance: 0.27 uF
Primary Planar Inductor Number of Turns: 3
Target Primary Resonant Frequency (fpri_target): fsec - 10% ~= 238 kHz
Measured Primary Resonant Frequency (fpri): 227 kHz
Primary coil to secondary coil vertical distance: ~1.25"

Inverter

Input: 120 VAC
Topology: Full-bridge
Vbus: ~340 V (voltage doubler)

Driver Settings

PRF: 120 Hz
Pulse Width: 200 usec
OCD Set Point: ~270 Amp (max)

I have applied 10 coats of Polyurethane to the secondary (by brush application).

The counterpoise seen in the foreground is a 30" x 50" plastic sheet covered with aluminum tape and connected to the secondary RF ground via a 14 gauge wire (about 1' in length). Strike rail is also connected to secondary RF ground via 14 gauge wire (~6" length).

To prevent undue stress to my cheap IGBTs, I have the driver set to only generate 250 cycles of the PRF on each trigger (done via BLE). That is why you hear the the signal start and stop.

[davekni]

If I understand correctly, this testing is at 340Vbus.  You are doing well to be testing at that bus voltage and not fried any IGBTs yet.

Do you have an oscilloscope or access to one?  Debugging DRSSTCs is much easier with scope captures.

MMC Capacitance: 0.27 uF

That's 2.6 ohms at 227kHz, too low for a 340V 270A H-bridge.  Lower capacitance and higher inductance would be better.  That also makes primary lead wire inductance less important (lower fraction of total primary inductance).

Primary coil to secondary coil vertical distance: ~1.25"

Coupling factor is likely on the low side of optimum too.  Use JavaTC to calculate coupling factor (and other parameters) based on your coil geometry.  0.14 to 0.145 is a good target for DRSSTC coupling.

Less detuning (primary frequency ~5% below secondary) is easier for getting initial breakout.  Once your circuitry is working well, more detuning will improve performance.

However if I hold a metal wire about 6" from the secondary and halfway up its length, I get what you see in the video below.

I recommend against testing this way.  Risks drawing an arc to secondary, damaging polyurethane coating.  BTW, getting higher voltage part way up the secondary than at the top suggests oscillation at a higher secondary harmonic frequency.  Scoping currents will indicate if this is indeed the case here.

Good luck!

[Dhaygoh]

First off, thanks for the quick reply and recommendations. It is much appreciated.

If I understand correctly, this testing is at 340Vbus.  You are doing well to be testing at that bus voltage and not fried any IGBTs yet.

Do you have an oscilloscope or access to one?  Debugging DRSSTCs is much easier with scope captures.

Yes, what you see is testing at 340Vbus. I have the input fed via a variac, what voltage do you recommend throttling down to while still being able to accurately characterize the system?

And yes, I have a scope. Was going to start digging in next, but wanted to check in here first to see if I was doing something wrong that was blatantly obvious.

That's 2.6 ohms at 227kHz, too low for a 340V 270A H-bridge.  Lower capacitance and higher inductance would be better.  That also makes primary lead wire inductance less important (lower fraction of total primary inductance).

What primary impedance at resonance should I target given my setup?

Coupling factor is likely on the low side of optimum too.  Use JavaTC to calculate coupling factor (and other parameters) based on your coil geometry.  0.14 to 0.145 is a good target for DRSSTC coupling.

Will look into it. Hard to see, but the primary coil and strike rail holder is 3D printed and allows me to move the primary coil plane up/down the legs by ~0.5" increments.

Less detuning (primary frequency ~5% below secondary) is easier for getting initial breakout.  Once your circuitry is working well, more detuning will improve performance.

Good to know, will try to get closer to the secondary resonant frequency. And just to confirm, I should be measuring the primary and secondary tank circuit resonant frequencies while they are decoupled from each other (e.g. not in the presence of each other and thus de-tuning one another) ?

I recommend against testing this way.  Risks drawing an arc to secondary, damaging polyurethane coating.  BTW, getting higher voltage part way up the secondary than at the top suggests oscillation at a higher secondary harmonic frequency.  Scoping currents will indicate if this is indeed the case here.

Agreed. I thought so too, I figured a standing wave was forming at a portion of the length due to being at a higher harmonic. I moved the tap on primary (greatly increasing the inductance) to try to influence the secondary resonance but the height at which the breakout occurred didn't seem to change much. I'm assuming the low coupling is playing a factor, and possibly the delta induced would be hard to notice without careful observation.

Thanks again for the suggestions.

[Dhaygoh]

In regards to the surge impedance, is the value proposed by Steve Conner in a 4vh.org thread a good starting point?

Source: https://4hv.org/e107_plugins/forum/forum_viewtopic.php?86591

I choose the surge impedance to be about 10 times the inverter's output impedance, but Steve Ward's newer coils have a lower impedance and seem to work great, so now I'd say 5 times. Anything between 5 and 10 seems to work, though.

The formula I use for the inverter output impedance is (4/pi)*(DC bus voltage/current limit) but since it's just a rough estimate, you can leave out the 4/pi.

And if it were a half bridge inverter, you'd need to divide the impedance by 2.

[Uspring]

Yes, it is a good starting point for typical coupling values. Steve Conners formula provide roughly the same results as the suggestions in this thread: https://highvoltageforum.net/index.php?topic=113.msg657#msg657

[davekni]

Yes, what you see is testing at 340Vbus. I have the input fed via a variac, what voltage do you recommend throttling down to while still being able to accurately characterize the system?

PRF: 120 Hz
Pulse Width: 200 usec
OCD Set Point: ~270 Amp (max)

Low duty cycle as you have is good for testing.  I'd start even lower, PRF <= 10Hz, at least for initial full-voltage testing.
If you have an isolated supply option (ie. bench supply) for VBus testing, that allows scoping gate waveforms (Vge).  I'd verify good Vge waveforms and phase lead (H-bridge outputs switching slightly before primary current zero-crossing times) before running at full voltage and higher duty cycles.  Phase lead will change slightly as VBus increases, but not too much.  I'd also verify that secondary ground current (or scope probe used as an antenna to pick up secondary voltage) matches primary frequency, not some harmonic of it.  Once everything looks roughly correct at low voltage, say 50V for VBus, then just double-check that phase lead doesn't change too much as VBus is increased.

And just to confirm, I should be measuring the primary and secondary tank circuit resonant frequencies while they are decoupled from each other (e.g. not in the presence of each other and thus de-tuning one another) ?

Yes, correct.

[Dhaygoh]

Yes, it is a good starting point for typical coupling values. Steve Conners formula provide roughly the same results as the suggestions in this thread: https://highvoltageforum.net/index.php?topic=113.msg657#msg657

Ok, thank you for the additional resource.

[Dhaygoh]

Low duty cycle as you have is good for testing.  I'd start even lower, PRF <= 10Hz, at least for initial full-voltage testing.
If you have an isolated supply option (ie. bench supply) for VBus testing, that allows scoping gate waveforms (Vge).  I'd verify good Vge waveforms and phase lead (H-bridge outputs switching slightly before primary current zero-crossing times) before running at full voltage and higher duty cycles.  Phase lead will change slightly as VBus increases, but not too much.  I'd also verify that secondary ground current (or scope probe used as an antenna to pick up secondary voltage) matches primary frequency, not some harmonic of it.  Once everything looks roughly correct at low voltage, say 50V for VBus, then just double-check that phase lead doesn't change too much as VBus is increased.

Thank you for the recommendations. I think I am definitely running at a higher harmonic. Didn't save the waveforms but the noise pick up I saw on the scope probes at the PRF interval was several integer multiples of the measured secondary resonance frequency. I am also monitoring the square-wave output of the ZVC circuit using a microcontroller, and the computed frequencies were much higher than expected but I had assumed that I had a bug in my firmware.

Will run the system at a much lower voltage and confirm the output of the ZVC circuit using the scope, then continue downstream as recommended.

Thanks again.