UD2.1b (DIY) output. kindly check

[Rafft]

 hi all

ive made my UD from protoboard. used a signal gen(around 400KHz sine) on 'feedback input + an interrupter set for 14uS  burst. scoped the mosfet output(after the ucc output) and I get almost 50vpk. is this normal? supply for the ucc is 9v and supply for N/P mosfets is 24v.I also connected the gdt(8T) and scoped the output. result is almost same as on mosfet output. surely this would kill igbt.

am I missing something here? 



update:
now Im scoping one of the output(mosfet drain/s) and referenced to circuit GND.

 

[davekni]

ive made my UD from protoboard. used a signal gen(around 400KHz sine) on 'feedback input + an interrupter set for 14uS  burst. scoped the mosfet output(after the ucc output) and I get almost 50vpk. is this normal? supply for the ucc is 9v and supply for N/P mosfets is 24v.I also connected the gdt(8T) and scoped the output. result is almost same as on mosfet output. surely this would kill igbt.

am I missing something here? 

The GDT output looks reasonable.  24V into UD2.7 generates +-24V gate signals.  The GDT input (one side) shows spikes.  Those are likely due to parasitic inductance in your protoboard build.  Appears that those spikes are short enough to not get through GDT.  (That is a bit surprising if the GDT output is not connected except to scope.)  It is always a good idea to include TVS diodes on IGBT G-E pins to clamp any excess spikes, whether from wiring inductance or ESD or whatever.

[Rafft]

Thanks David

I guess best thing todo here is a step-down gdt to lower output OR use a  9Vac supply input(12.7Vdc for mosfet/s bridge power supply) + 30v tvs on igbt gates.

1:1:1 is easier to wind.

edit: lowered power for UD. rewound 1:1:1 8T gdt. here is my setup.. and the half-bridge as well


output from mosfet/s(driver)


and output from one of gdt out. and based on pulse width, this has to be the inverted(other output)



cheers
Ralph

[davekni]

edit: lowered power for UD. rewound 1:1:1 8T gdt. here is my setup.. and the half-bridge as well

Yes, 1:1:1 is both easier to wind and results in lower leakage inductance.  Even better if lead wires are twisted all the way including your white GDT to pink lead wires.  (No difference when unloaded.  Will be better when FETS/IGBTs are connected.)  Nice GDT construction.
Common-mode chokes are a nice touch.  I use them frequently, though not that frequently seen on the forum.  Can be even more helpful on the GDT output connected to the upper FET/IGBT, as that winding experiences rapid high-voltage transitions.
12V is fine for FET gate drive.  Too low for IGBTs.  Most DRSSTC IGBT gate drive is +-24V.  Increases peak IGBT current capability over their rated 15V drive.  I use 19Vge for most of my IGBT projects.

30v tvs on igbt gates.

I like to solder TVS diodes directly to the IGBT leads where they exit the package at the start of any build.  That way they reduce chance of ESD damage during handling and construction.  The exposed gate leads can accidentally be touched before grounding yourself and the IGBTs.  Smaller TVS diodes such as the P6KE family are ideal.  Larger 1P5KE parts have more capacitance, so load the driver outputs more.

[Rafft]

David

thanks for the compliment.

12V is fine for FET gate drive.  Too low for IGBTs.  Most DRSSTC IGBT gate drive is +-24V.  Increases peak IGBT current capability over their rated 15V drive.  I use 19Vge for most of my IGBT projects.

ok. Im more confused here. yes I will be using IGBT , so gate drive needs to be +-24v(as my previous attempt). +-24v would be 48V Vge, right??. still SAFE with IGBT? scope math shows 24vRMS. should I go back to using 24Vdc supply for the final mosfet driver/s?
what does the Vge see here? the 48V or 24vrms?
so does your 19Vge mean +-9.5v?
if ever I would use +-24V (Vge=48v) then this would mean it would always BE CLAMPED by the 30V TVS(clamps @ 32v). not sure if this would cause the  TVS to heat up or something

Can be even more helpful on the GDT output connected to the upper FET/IGBT, as that winding experiences rapid high-voltage transitions.Can be even more helpful on the GDT output connected to the upper FET/IGBT, as that winding experiences rapid high-voltage transitions.

yes I remember seeing your older posts on this ferrite. is it supposed to be connected in-series with just the gate resistor? or in series with both the combined gateRes/antiparallel diode?

I like to solder TVS diodes directly to the IGBT leads where they exit the package at the start of any build.  That way they reduce chance of ESD damage during handling and construction.  The exposed gate leads can accidentally be touched before grounding yourself and the IGBTs.  Smaller TVS diodes such as the P6KE family are ideal.  Larger 1P5KE parts have more capacitance, so load the driver outputs more.

Im using P6KE30CA.




how my half-bridge is wired NOW. using IRG4PC50FD. for test. according to calculations, this igbt is only rated till 150KHz (but ill try it for 360KHz anyway). ordered 60N60SMD from china. based on datasheet, can do 456KHz..but probably fake


regarding my previous scope shots, It still hav that overshoot. was playing around with my scope when I saw this mode: HighRes & normal

[davekni]

ok. Im more confused here. yes I will be using IGBT , so gate drive needs to be +-24v(as my previous attempt). +-24v would be 48V Vge, right??. still SAFE with IGBT? scope math shows 24vRMS. should I go back to using 24Vdc supply for the final mosfet driver/s?
what does the Vge see here? the 48V or 24vrms?
so does your 19Vge mean +-9.5v?
if ever I would use +-24V (Vge=48v) then this would mean it would always BE CLAMPED by the 30V TVS(clamps @ 32v). not sure if this would cause the  TVS to heat up or something

+-24V transitions from +24V to -24V to +24V etc.  It is never 48V.  RMS voltage is 24V (during enable pulses).  It is called 48Vpp, the difference between positive peak and negative peak.  However, Vge is never more than 24V, + or -.  At no instance in time is gate voltage more than 24V from emitter voltage.  IGBTs are rated for 15Vge (+-15V), but DRSSTC use is generally better with somewhat over-driven gates.  I use +-19V, but many people use +-24V to squeeze even slightly more peak current.  At high frequency, switching losses dominate, so there is little advantage going all the way to 24V.  If you have a ~18V supply for your driver, that would be great, saving a bit of driver power relative to 24V.  (I use 19.5V laptop power supplies scavenged from electronics recycling bins at work.)  30V TVS diodes will be fine.  Must be the bidirectional type to handle both +24V and -24V (or +-19V or whatever you choose).  Yes, P6KE30CA is good.

yes I remember seeing your older posts on this ferrite. is it supposed to be connected in-series with just the gate resistor? or in series with both the combined gateRes/antiparallel diode?

My use of gate inductors was to increase dead-time (delay rising Vge edges).  No need to copy that.  Just adds confusion.  I was referring to your common-mode chokes in your image, where both wires loop through ferrite cores.  You have some on DC supply inputs to driver and one on driver-to-GDT connection.  I was suggesting a similar common mode choke on the high-side GDT output, where the twisted pair loops through a core a few times.  Definitely not necessary.

how my half-bridge is wired NOW. using IRG4PC50FD. for test. according to calculations, this igbt is only rated till 150KHz (but ill try it for 360KHz anyway). ordered 60N60SMD from china. based on datasheet, can do 456KHz..but probably fake

Datasheet looks good.  Hope the likely-fake parts are close enough in performance to work for you.  Will be interesting to see how the old parts work too.

regarding my previous scope shots, It still hav that overshoot. was playing around with my scope when I saw this mode: HighRes & normal

Those very-high-frequency spikes/ringing will likely get filtered by IGBT gate capacitance and TVS diode capacitance, so likely not cause any issue at all.
BTW, great to see other scopes with HighRes mode now.  It was invented by Tektronix, long enough ago that patents are expired.  I use HighRes mode most of the time, but do need to keep aware of its low-pass-filter functionality that goes along with increased resolution from the within-sample averaging.