DRSSTC low power testing killing IGBTs

[FonziDaytona]

I’ll wind another GDT (less than 1:2:2 since I’m only needing another 5v or so) tonight to see what the waveforms look like. This would be much easier than reworking the EVR design.

My planned upgrade (ud2.7 with a cm300 half bridge) won’t have this problem. Just need a few more parts to make the swap.

-Matt

[FonziDaytona]

Rewound the GDT for 10 turns on the secondary and 7 turns on the primary.

Look okay? It boosted the voltage up a few volts but also has a little more overshoot.

[davekni]

Rewound the GDT for 10 turns on the secondary and 7 turns on the primary.

Look okay? It boosted the voltage up a few volts but also has a little more overshoot.

Overshoot looks OK.  Not nearly enough to damage IGBT gates, and dip after overshoot isn't significant.

One puzzle:  Normally falling edge has quite a bit more overshoot (undershoot) than rising edge due to diode across gate series resistor.  This looks so symmetric that I'd guess either diodes are missing or shorted or gate resistors are so low value that diodes don't conduct significantly.

[FonziDaytona]

Looking at previous scope shots, the undershoot looks to be close to or the same as these do, and slightly more than the overshoot. Maybe just a coincidence?

The gate resistance is 5.4ohm (measured). If diodes were shorted, I should see a short across the gate resistance, no? I guess they could be open…

Guess it’s clear to let it rip? I’ll see if I can push higher peak amps this time.

-Matt

[davekni]

Looking at previous scope shots, the undershoot looks to be close to or the same as these do, and slightly more than the overshoot. Maybe just a coincidence?

Captures in your posts #4, #9, and #12 look more like I'd expect, with undershoot on falling edge and slower rising edge with little overshoot.  Difference may be due to just increased GDT leakage inductance combined with gate resistor not increasing to match.

Guess it’s clear to let it rip? I’ll see if I can push higher peak amps this time.

Probably.  There is always some risk.  Hard to tell how dead-time compares with original waveforms.  Didn't spot any previous captures so nicely comparing Vge of the two IGBTs as this last capture does.  Probably OK.

Hope power testing goes well!

[FonziDaytona]

So far so good. Up past 24” arcs now.

I’ve noticed that the OCD trips (set for 400A) yet the scope doesn’t show current going above 320A. What gives? Would this be transients that are too fast for the scope, but somehow long enough for the OCD circuit? Or, is the EVR OCD design up to some shenanigans? Should I set the OCD per the scope shots or stick to EVR settings chart?



-Matt

[davekni]

I’ve noticed that the OCD trips (set for 400A) yet the scope doesn’t show current going above 320A. What gives? Would this be transients that are too fast for the scope, but somehow long enough for the OCD circuit? Or, is the EVR OCD design up to some shenanigans? Should I set the OCD per the scope shots or stick to EVR settings chart?

As long as you are confident in your scope path, then set it based on that.  EVR OCD circuit places diode bridge after CT burden resistor.  )After most of burden resistance, 1.6ohms.)  100 ohm resistor after bridge along with 1uF filter cap make for relatively high peak diode current for 1N4148 signal diodes.  Diode forward drop is part of OCD setpoint calculation, but is not very precise at high current peaks.  1uF filter cap minimizes sensitivity to transients.