Improving IGBT gate drive

[Nijin]

Hi guys !

I'm working on my drsstc and after many researches on how to drive an igbt, i want to share with you a new design of the IGBT gate drive circuit. This circuit can be use to drive efficiently one or more IGBT in parallel.

Motivation :
New technologies of IGBT are more suitable for paralleling operations. When you want to build small to medium power SSTC, you can choose between IGBT module or TO247. As TO247 are cheaper, it could be a better choice to use two or more TO247 in parallel than using an IGBT module, especially if you want to drive them at high frequency.


Since I design DRSSTC, the most efficient gate driver circuit I saw is the circuit with a diode to shunt the gate resistance. The aim of the diode is to reduce the gate resistance when discharging the gate to turn off quickly the IGBT. But the reduction of this resistance increase the voltage on the gate because the RLC circuit of the driver is under-damped.


To solve this problem, instead of using a diode, you can use a PNP transistor close to the gate to short it. The discharge current will no longer go through the GDT and the current path will have a smaller loop which means a smaller parasitic inductance. You can find more information on the TI application report "Fundamentals of MOSFET and IGBT Gate Driver Circuits".


The other improvement is the current balancing in parallel operation. When paralleling IGBT, some stray inductance is present at the emitter of the IGBT modules. The value of stray inductance for
the two IGBTs could differ. Because the IGBTs are connected in parallel, the common ground voltage will remain the same for both the IGBTs but the auxiliary emitter voltages will differ. This voltage difference between the auxiliary emitter terminals of the two IGBTs results in current flow from one terminal to the other. Depending on the direction of the circulating current the actual voltage at the IGBT gates will either increase or decrease resulting in unequal current sharing.
To overcome this problem, you can use a emitter resistor to help attenuating the circulating current or/and use a common-mode choke in the gate path.

This lead me to design this gate driver circuit.

It requires only 3 additional components to improve the driving. and if you just want to use it to drive one transistor, you can simply solder jumper instead of the common mode choke.


To finish the design of this driver, i still need to find a reference for the D1, Q2 and L1.

Tell me what do you think about this circuit and if you have any comments

If you are curious you can find more information on this paper :
- TI Designs "IGBT Gate Driver Reference Design for Parallel IGBTs With Short-Circuit Protection and External BJT Buffer" TIDUC70A
- TI Application Report "Fundamentals of MOSFET and IGBT Gate Driver Circuits" SLUA618A

[fnordest]

This looks interesting. I don't have any inverters with parallel IGBTs yet but some nasty overshoot during gate-turnoff. Have you run a simulation to get some parameters? I will have a look at it when i am in my workshop next week.

[Nijin]

I made a simple simulation with falstad to choose the PNP transistor but i not saved it.
You can find how to choose Re in the application notes. For L1, i'm looking for a Coilcraft common choke. The impedance of the differential mode of L1 at the resonant frequency need to be very small or it will slower IGBT commutation.You can choose a choke with a large bandwidth above the resonant frequency.