OpAmp regulator stability calculation

[TMaxElectronics]

After taking the analog circuits course at my university I thought it might be a cool idea to build an OpAmp regulated power supply. Nothing fancy only 30V 3A linear with a switched pre regulator, and maybe dual tracking if I could be bothered. But I've hit a dead end trying to figure out if the circuit is stable. I have calculated the loop gain and phase depending on the load impedance by cascading the voltage gain of the opamp, the base resistor and the current gain of the drive and the pass transistor, and got a phase margin of something like 60°. However simulating the circuit in spice shows that it is not stable at all and starts to oscillate wildly even just under ramped output voltage conditions.

So my question is: Did I make some sort of mistake analysing my circuit or are the non-idealities of all of the components too big a factor to analyse this the old fashioned way? I would kind of like to get this running without using spice just for practice if that's possible

Here's the circuit after I compensated the OpAmps. It is stable in the configuration shown.


This is not 100% the way I'll build it btw (mainly since the switched pre-regulator isn't there), but I think a close enough approximation for a POC. I'll change the output current sense to be differential and in the positive output path instead of to ground, and I have to think of some better way of limiting current. I want to keep the supply voltage for the control stuff single rail if possible and right now that means it could only limit to ~4V before the voltage drop across that diode causes problems.

[Twospoons]

the non-idealities of all of the components too big a factor to analyse this the old fashioned way?

^ this.

I long ago gave up hand calcs for all but the simplest analog systems.  Running AC spice sims with complex models is much faster, and more accurate.   The thing to take out of the analog circuits course is not how to calculate things like phase margin, but more understanding what the results mean - and from that you can improve your circuit.  Seeing your circuit is unstable is one thing, but more important is understanding why its unstable.

With your current limit feed back  you could use a MOSFET or BJT instead of a diode, to get rid of the v drop; or you could invert your signal, flip the diode, and feed into the negative opamp input, overriding the voltage feedback.

[davekni]

The thing to take out of the analog circuits course is not how to calculate things like phase margin, but more understanding what the results mean - and from that you can improve your circuit.  Seeing your circuit is unstable is one thing, but more important is understanding why its unstable.

I certainly agree, but believe that some practice hand-calculating is the best way to gain the understanding.  It is also very helpful to be able to make rough estimate calculations during initial design.  That can drastically reduce the number of iterations needed in simulation/refinement.

It looks like V1 is the input voltage to your regulator, but is shown as a sine function.  Are you sure you have appropriate DC bias conditions when running AC analysis?  I find that the most common pitfall of AC analysis - analyzing under the wrong DC state, not the intended operating point.  Sometimes AC analysis needs to be ran across sweeps of DC voltages and currents.  Transistor gains and capacitances and frequency response change with voltage and current.

[TMaxElectronics]

I long ago gave up hand calcs for all but the simplest analog systems.

Yeah I was kind of expecting that haha. But as dave said I want to kind of know the manual way of calculating stability to get that feeling for what I need to do. Just placing capacitors to sort of slow the opamp down and then playing with the values hardly results in a properly engineered circuit to me

It looks like V1 is the input voltage to your regulator, but is shown as a sine function

Yes in deed it is. It has a 35V bias which I must admit is the worst case and probably inaccurate especially for the very low output voltages but was good enough to see if my circuit idea would even work
It is an ac source to allow for PSRR calculation, which I did by adding an ac signal to the source and running a sweep. gave me something like a bandpass with -40dB between maybe 1kHz and 10kHz falling off at 20dB/dec to around 80dB (all simulated at 30V output with a 3A load).

I have yet to do simulation of load regulation, but the overcurrent limit with a ramped output voltage and a resistive load works well and has almost zero over or undershoot when regulation starts.

you could use a MOSFET or BJT instead of a diode

Yeah kind of obvious that one... should have thought of that

Another thing I am wondering about is how I could implement the switching regulator voltage control. I guess it would be simple enough if I used the optocoupler feedback all of those chinesium USB power supplies use, and instead of using a zener diode use a differential amplifier that measures the voltage across the pass transistor and compare that to say 3V or something. But I'm guessing that would have fairly poor load regulation right? (even though that would technically be taken care of by the linear part of the reg). I couldn't really think of a better way of communicating the desired output voltage to the pwm regulator in any other way.

And finally (so much new stuff to ask about I'm sorry ) has anybody got experience in self winding mains driven flybacks for low-ish output voltages? (certainly low for flybacks on this forum haha). I have done this quite a bit with E-Cores for low voltage stuff (converting 5V to 24V and stuff like that) but I'm kind of hesitant to make something mains powered with that technique. Is there maybe some special high voltage double insulated secondary wire I could use or am I overthinking things a little and mylar between the windings is perfectly fine?

[davekni]

AC for V1 makes sense now.  Hadn't noticed that the "30" parameter was DC offset rather than amplitude.

When you run AC simulation, is V3 set to some non-zero voltage?  If left as a ramp starting at 0V, AC simulation likely uses that 0V condition, so no output current.

As drawn it looks like you have little if any phase margin with unity gain at just under 1us (~200kHz).  Typical current gain of the two BJTs is likely around 20,000.  The integrator R8/C4 has unity gain at 1us.  At 1us, current through R1 * 20,000 and then to C3 has a gain of 2.  (C3 impedance is 0.1 ohms at 1us, so the 10ohm load is insignificant.)  At 1us, C1 to R3 adds only a tiny bit of phase-lead, perhaps about enough to compensate for delays through the BJTs.

I'm not sure if the above paragraph's abbreviated hand analysis is clear or not.  It is the sort of rough analysis I do during design before getting to simulation.

Separate from stability, you will find that BJT current gain has wide tolerance and poor temperature stability.  D45H11 has almost 3:1 change from -40C to 125C die temperature.  Minimum gain is 60 with no maximum specified.  This is typical.  Gain (beta) is determined by many factors, thickness of the thin base layer being one of the hardest to accurately control.  For one-off home designs I'll sometimes use BJT current gain directly as in your circuit.  For any real industrial circuits BJTs need to be used with emitter degeneration or other circuit features to minimize the effect of current gain changes.

Have fun learning!